n I /If I f§©@ IN PERFORMANCE The word is getting around. There is simply no better processor available for general purpose computer work than the Motorola MC6800. This memory oriented processor is easier to program and makes possible more efficient, shorter and faster running programs than the old fashioned bus oriented processors. Have you been convinced that machine language, or assembler programs are only for the experts? Well not with a modern 6800 based computer. Anyone can learn very quickly with this simple straight- forward hexidecimal notation pro- cessor. When you add to these ad- vantages the unique programmable in- terfaces and the Mikbug® ROM you truly have a "benchmark" system. Mikbug® eliminates the tedious and time consuming job of loading the bootstrap program from the switch console each time the computer is turn- ed "On". With Mikbug® this is auto- matic and you simply don't have switches and status lights. It has been said (not by us) that a switch console is essential for "hardware development," (perhaps they meant "hardware de- bugging"). Anyway the SwTPC 6800 system has no need for either. This is a fully developed, reliable system with no strange habits. All boards have full buffering for solid noise immune oper- ation. One crystal type clock oscillator drives everything, processor interfaces and all; so there are no adjustments and no problems. FOR VALUE The SwTPC 6800 in its basic form comes complete with everything you will need to operate the computer ex- cept an I/O device. This may be either a teletype of some kind, or a video terminal. You get a heavy duty an- nodized aluminum case, a 10 Amp power supply large enough to power a fully expanded system, a mother board with seven memory/processor slots and eight interface slots, a 2,048 word sta- tic memory and a serial control inter- face. This kit is now only $395.00. It was introduced at $450.00, but when processor prices went down we reduced the price of the kit accordingly. As an owner of our 6800 computer you will get copies of our newsletter with helpful information and software listings. We have a library of software including all the common computer games and our fantastic BASIC. This is available to you for the cost of copy- ing, you don't have to buy anything to get this material. What more could you want? Pay a visit to our nearest dealer and see the 6800, plus our new cassette interface, graphics terminal and printer. He will be happy to demonstrate our system and to sup- ply you with a 6800 that will fit your exact needs. Mikbug® is a Motorola Trademark Ol Computer System with serial interface and 2,048 words of memory $395.00 Southwest Technical Products Corp. 219 W. Rhapsody San Antonio, Texas 78216 The Computer Store, 820 Broadway, Santa Monica, Calif. 90401, (213) 451-0713 Cyberdux, Microcomputer Applications, 1210 Santa Fe Dr., Encinitas, Calif. 92024 (714) 279-4189 The Micro Store, 634 South Central Expressway, Richardson, Texas 75080 (214) 231-4088 ELS Systems, 2209 N. Taylor Rd., Cleveland Heights, Ohio 44112 (216) 249-7820 Microcomputer Systems Inc., 144 S. Dale Mabry Ave., Tampa, Florida 33609, (813) 879-4301 William Electronics Supply, 1863 Wood- bridge Ave., Edison, N.J. 08817 (201) 985-3700 Computer Mart of New York, Inc. 314 Fifth, New York, N.Y. 10001 (212) 279-1048 The Byte Shop Computer Storey 1, 1063 El Camino Real, Mountain View, Calif. 94040, (415) 969-5464 The Byte Shop Computer Store#2, 3400 El Camino Real, Santa Clara, Calif. 95051, (408) 249-4221 A-VID Electronics Co., 1655 E. 28th Street, Long Beach, Calif. 90806 (213) 426-5526 Computer Warehouse Store, 584 Common- worth Ave., Boston, Massaschusetts 02215 (617) 261-1100 The Computer Workshop, Inc., 11308 Hounds Way, Rockville, Ind. 20852 (301) 468-0455 The Computer store, Inc., 120 Cambridge Street, Burlington, Mass. 01803 (617) 272-8770 Marsh Data Systems, 5405 B. Southern Comfort Blvd., Tampa, Florida 33614 (813) 886-9890 Midwest Enterprises Inc., 815 Standish Ave., Westfield, New Jersey 07090 (212) 432-2066 The Milwaukee Computer Store, 6916 W. North Ave., Milwaukee, Wl 53213 (414) 259-9140 Control Concepts, P.O. Box 272, Needham Heights, Mass. 02194 American Microprocessors, Equipment & Supply Corp. at Chicagoland Airport, P.O. Box 515, Prairie View, Illinois 60069 (312) 634-0076 The Computer Room Inc., 3938 Beau D'Rue Dr., Eagan, Minn. 55122, (612) 452-2567 Computerware, 830 First St., Encinitas, Calif. 92024 (714) 436-9119 Atlanta Computer Mart, 5091 B Buford Highway, Atlanta, Ga. 30340 (404) 321-4390 Four ways to get more out of (or into) your computer Here are four ol our most popular computer peripherals. They let you do a lot more with your Altair 8800 or IMSAI 8080. They are simple to use and simple to install. And they all have the combined quality and low price that has made Cromemco the leading name in microcomputer peripherals. Cromemco's delivery is prompt, too. Watch this space for other exciting new Cromemco products to come. !%«:^fc= s«i: Iter. ■■ te^te: - *.:-~t 1111 K BYTESAVER The easy way to put programs into PROM. Cromemco's Bytesaver™ gives you a place for up to 8K of PROM memory using 2704/2708 PROMs. Also gives you a built-in PROM programmer (saves buying one separately). Enough memory capacity to hold powerful programs such as 8K BASIC. Kit (Model 8KBS-K): $195. Assembled (Model 8KBS-W): $295. Let your color TV be your display terminal. You can have a full-color computer display terminal at unbelievably low cost with the Cromemco TV Dazzler™. You can display multi- colored charts, graphs, educational material, games. Requires only 2K-byte memory for 128 x 128-element picture. Kit (Model CGI-K): $215. Assembled (Model CGI-W): $350. Fast analog I/O with 7 channels. Couples your digital com- puter to an analog world. This advanced board lets you input 7 channels of analog to your computer and output 7 channels of analog to feed to output devices. Also has an 8-blt parallel I/O port. Very fast conversion — only 5 micro- seconds. Kit (Model D + 7A-K): $145. Assembled (Model D + 7A-W): $245. JOYSTICK ALSO AVAILABLE: Kit (Model JS-1-K): $65. Assem- bled (Model JS-1-W): $95. Low-cost Optical Data Digitizer: This small, rugged camera is useful for image recognition, process control, and other Industrial applications. Has f2.8 25-mm lens. Uses image sensors that produce 1024-element (32 x 32) picture. Con- troller boards also available to give software control of exposure, frame rate and memory allocations for picture storage. Camera kit (Model 88-ACC-K): $195. Controller kit (Model 88-CCC-K): $195. Camera assembled (Model 88- ACC-W): $295. Controller assembled (Model 88-CCC-W): $295 n Cromemco Specialists in computer peripherals ^^^^^ 2432 Charleston Rd., Mountain View, CA 94043 • (415) 964-7400 Imagine a microcomputer Imagine a microcomputer with all the design savvy, ruygedness, and sophistication of the best Imagine a microcomputer supported by dozens of interface, memory, and processor option boards. One that can be interfaced to an indefinite number of peripheral devices including dual floppy discs, CRTs, line printers, cassette recorders, video dis- plays, paper tape readers, teleprinters, plotters, and custom devices. Imagine a microcomputer supported by exten- sive software including Extended BASIC, Disk BASIC, DOS and a complete library of business, developmental, and industrial programs. Imagine a microcomputer that will do everything a mini will do, only at a fraction of the cost. You are imagining the Altalr™ 8800b. The Altair 88001) is here today, and it may very well be the mainframe of the 70's. The Altair 8800b is a second generation design of the most popular microcomputer in the field, the Altair 8800. Built around the 8080A micro- processor, the Altair 8800b is an open ended machine that is compatible with all Altair 8800 hardware and software. It can be configured to match most any system need. NOTE: Altair is a trademark of MITS, Inc. Redesigned front panel. Totally synchro- nous logic design. Same switch and LED arrangement as original Altair 8800. New back-lit Duralith (laminated plastic and mylar, bonded to aluminum) dress panel with multi-color graphics. New longer, flat toggle switches. Five new functions stored on front panel PROM including; DISPLAY ACCUMULATOR (dis- plays contents of accumulator), LOAD ACCUMULATOR (loads contents of the 8 data switches (A7-AO) into accumulator) OUTPUT ACCUMULATOR (Outputs con- tents of accumulator to I/O device addressed by the upper 8 address switches), INPUT ACCUMULATOR (in- puts to the accumulator from the I/O device), and SLOW (causes program execution at a rate of about S cycles per second— for program debugging). Full 18 slot motherboard. Rugged, commercial grade Optima cabinet. New front panel interface board buffers all lines to and from 8800b bus. -Two, 34 conductor ribbon cable assem- blies. Connects front panel board to front panel interface board. Eliminates need for complicated front panel/bus wiring. New, heavy duty power supply +8 volts at 18 amps, + 18 volts at 2 amps, 18 volts at 2 amps. 110 volt or 220 volt operation (SO/60 Hz). Primary tapped for either high or low line operation. •New CPU board with 8080A micro- processor and Intel 8224 clock generator and 8216 bus drivers. Clock pulse widths and phasing as well as frequency are crystal controlled. Compatible with all current Altair 8800 software and hardware. altair 8800-b M ITS, Inc. 1976/2450 Alamo S.E. /Albuquerque, New Mexico 87106 In This BOTE Whatever your stand on the ques- tions of free exchange of software, one thing is certain: To write software of any form is an act of creation. The decision as to what is done with a work of software should reside with the creator. If you are a writer of software, find out about some of the legal aspects of your work by reading Calvin N Mooers' Are You an Author? A multiprocessor system is a combi- nation of two or more processors to accomplish more than what a single processor could do by itself. In his article Build This Mathematical Func- tion Unit, author R Scott Guthrie describes a simple form of the multi- processor concept: a scientific calcu- lator unit controlled by an 8 bit microprocessor. The calculator comes preprogrammed with all the software you need to carry out floating point arithmetic operations and special func- tions, to say nothing of an arithmetic expression parser implicit in the paren- thesis keys. The calculator peripheral in one fell swoop eliminates a lot of the software development required for an interpretive mathematically oriented computer language. Learn how to Randomize Your Programming by reading Robert Grappel's discussion of pseudorandom number sequences along with practical software to implement 8 or 16 bit generators. About the Cover BYTE began with its first issue dated September 1975. Since that time, a 96 page magazine has grown into a 128 page monthly compendium of information with a reputation of which we're quite naturally proud. That first issue was assembled from scratch in seven weeks of hectic activity starting May 25 1 975. At that time, we had no real estimate of the way in which you, our readers, would respond. The goal was simply to put out the best product possible given the constraints and problems of a new enterprise. Since that time, much has changed as the people who bring you this magazine have all grown and improved with experience. The principles upon which BYTE is based, technical excellence combined with a sense of humor and a spirit of fun, have not changed. As a celebra- tion of that combination, we commis- sioned Robert Tinney to implement a fanciful picture of the BYTE 0.01 Centennial Celebration. With this very personal anniversary, we look forward to the developments and improve- ments of the coming year. In BNF notation, < the contents of the BYTE staff listing, page 5> Well, here it is: the first version of Star Trek to be printed in full in BYTE. Gerald H Herd describes his version of A BASIC Star Trek Trainer as implemented on a Data General NOVA, but easily adaptable to any BASIC machine with about 5 K bytes of text area. One of the choices open to readers familiar with the industrial OEM mar- kets is to purchase computer products intended for systems engineering situ- ations. In his product description article on The MSC 8080+ Microcom- puter as a Personal System, BYTE reader Ken Barbier enthusiastically describes one such product and his experiences using it. Binary, octal, hexadecimal or decimal? That is the question. What- ever your preference, however, James Brown will help you out with his article on How to do a Number of Conversions. By implementing the whole set of conversions, you can try each base on for size, depending upon your mood and idiosyncracies. Last month, Burt Hashizume de- scribed the neat new architecture of the "super 8080" called Z-80 by its maker, Zilog Inc. In this issue, Dr Robert Suding brings the excitement down to earth with the complete details of The Circuit for Z-80s, a complete central processor with some programmable memory and a dash of systems software in an erasable ROM thrown in for good measure. What's an SC/MP? Find out by reviewing Robert Baker's Microproc- essor Update: SC/MP Fills a Gap. In the final instalment of our series of three reprints from Nat Wads- worth's Machine Language Program- ming for the "8008" (and Similar Microcomputers), you'll find some information on the details of machine language programming in computers with limited resources. Recycling pretested integrated cir- cuits mounted on surplus printed cir- cuit boards is an inexpensive way to obtain a good parts inventory. The main problem is getting the circuits off the board. Ralph Droms and Jonathan Bondy have dreamed up A Flameless IC Recycling Trick as one way to accomplish the recycling goal. What does it take to program an 8080 debugging monitor? Joe Kasser and Richard Allen describe AMSAT's answer to this question in AMSAT 8080 Standard Debug Monitor: AMS80 Version 2. This is a complete assembly of a useful control program which can be adapted to any 8080 based microcomputer system. In the Queue t ElTf # 13 (or, if you're superstitious, volume 2, number 1) SEPTEMBER 1976 staff 26 36 40 50 62 104 108 16 44 76 84 Foreground BUI LD THIS MATHEMATICAL FUNCTION UNIT-Part 1 Hardware— Guthrie RANDOMIZE YOUR PROGRAMMING Software— Grappel A BASIC STAR TREK TRAINER Software— Herd HOW TO DO A NUMBER OF CONVERSIONS Software— Brown THE CIRCUIT FOR Z-80s Hardware— Sliding A FLAMELESS IC RECYCLING TRICK Techniques— Bondy-Droms AMSAT 8080 STANDARD DEBUG MONITOR: AMS80 VERSION 2 Systems Software— Allen-Kasser Background ARE YOU AN AUTHOR? Software— M ooers THE MSC 8080+ MICROPROCESSOR AS A PERSONAL SYSTEM Product Description— Barbier MICROPROCESSOR UPDATE: SC/MP FILLS A GAP Hardware— Baker MACHINE LANGUAGE PROGRAMMING FOR THE "8008"-Chapter 3 Software— Wadsworth Nucleus 4 In This BYTE 6 Come One, Come All! 12 Letters 61 Software Bug of the Month 4 73 BYTE's Bits 74, 81, 96 What's New? 92 Classified Ads 98 Clubs, Newsletters 124 Programming Quickies 128 BOMB 128 Reader's Service BYTE magazine is published monthly by BYTE Publica- tions, Inc., 70 Main St, Peter- borough, New Hampshire 03458. Subscription rates are $12 for one year worldwide. Two years, $22. Three years, $30. Second class postage paid at Peterborough New Hamp- shire 03458 and at additional mailing offices. Phone 603-924-7217. Entire contents copyright 1976 BYTE Publica- tions, Inc. Peterborough NH 03458. Address editorial cor- respondence to Editor, BYTE, 70 Main St, Peterborough NH 03458. PUBLISHERS Virginia Peschke Manfred Peschke EDITOR Carl T Helmers, Jr GENERAL MANAGER Manfred Peschke PRODUCTION MANAGER Judith Havey CIRCULATION Deborah R Luhrs DEALER CIRCULATION Deena Zealy PUBLISHERS ASSISTANTS Cheryl Hurd Carol Nyland ADVERTISING Elizabeth Alpaugh Virginia Peschke TYPOGRAPHY Custom Marketing Resources, Inc Goodway Graphics Mary Lavoie Taimi Woodward PHOTOGRAPHY Ed Crabtree Custom Marketing Resources, Inc ART Mary Jane Frohlich Bill Morello PRINTING The George Banta Company Custom Marketing Resources, Inc ASSOCIATES Bob Baker Dan Fylstra Harold A Mauch Chris Ryland PRODUCTS COORDINATOR Floyd W Rehling Come One, Come All! Editorial by Carl Helmers Articles Policy BYTE is continually seek- ing quality manuscripts writ- ten by individuals who are applying personal systems, or who have knowledge which will prove useful to our read- ers. Manuscripts should have double spaced typewritten texts with wide margins. Num- bering sequences should be maintained separately for fig- ures, tables, photos and list- ings. Figures and tables should be provided on separate sheets of paper. Photos of technical subjects should be taken with uniform lighting, sharp focus and should be supplied in the form of clear glossy black and white prints (if you do not have access to quality photog- raphy, items to be photo- graphed can be shipped to us in many cases). Computer list- ings should be supplied using the darkest ribbons possible on new (not recycled) blank white computer forms or bond paper. Where possible, we would like authors to supply a short statement about their background and experience. Articles which are accepted are typically acknowledged with a binder check 4 to 8 weeks after receipt. Honorari- ums for articles are based upon the technical quality and suitability for BYTE's reader- ship and are typically $15 to $30 per typeset magazine page,, We recommend that au- thors record their name and address information redun- dantly on materials submitted, and that a return envelope with postage be supplied in the event the article is not accepted. ■ NCC 1976 BYTE shared a booth with David Ahl's Creative Computing at the 1976 NCC show June 7-10 in New York. For those who are not familiar with the computing trade, NCC is the big trade show sponsored by AFIPS (American Federation of Information Pro- cessing Societies) and attended by large numbers of people in the traditional data processing world. It features a strong techno- logical information program with lecturers on numerous topics, as well as one of the most complete trade shows with booths manned by every major manufacturer and vendor in the computer industry. This year's floor show was in the New York Coliseum, and the technical presenta- tions were held in the New York Hilton and Americana Hotels. I attended a technical session on personal computing on Tuesday morning June 8 in the Americana Hotel. Speakers at this session included Stephen B Gray, Ted Nelson, and Dr Alfred Bork. The theme of Ted Nelson's talk was the idea of the computer becoming a home appliance, a necessity in the home in the same way that a lot of technological innovations have be- come "necessities." Computer Lib becomes a reality. To an audience of very sym- pathetic professionals, Ted emphasized the concept of the computer and its use as a "way of life," in the same sense that talking is a way of life. For those initiated into the art of computing, the truth of this view is quite evident. Ted also made great argu- ments for eliminating the term "microcom- puter" — what we're all building, buying or using is not micro in any sense of the word, but simply an inexpensive computer of the general purpose variety. (Eliminating that term also gets rid of an ambiguity with respect to microprogramming.) Ted made a strong case of comparison between the traditional "cuckoo" computer center con- cept and the medieval church with its priesthood and obscure Latin language. Per- sonal computing as practiced by large num- bers of people will help end the con- centration of apparent power in the "in" group of programmers and technicians, just as the enlightenment and renaissance in Europe brought about a much wider under- standing beginning in the 14th century. (See a forthcoming article by Dave Fylstra and Mike Wilbur for some further commentary on the subject.) Ted also introduced his concept of the perfect computer store, when he started talking about the "itty bitty machine corpo- ration" whose first computer store is to open soon in Evanston IL. He intends to become the McDonald's of computing. By way of formal legalisms, he entered several terms into interstate commerce, a first step toward obtaining a legally protected trade- mark: "FUNTRAN" is the itty bitty machine corporation's extensible function translation language, providing word proces- sing, planning and figuring. "Simulatrix" is his name for a proposed library of games with educational and recreational values combined, a library to be maintained with royalties to authors. Interactive art works itty bitty machine corporation is to sell under the "Lady Lovelace" trade name (not a porn film, but the name of the world's first programmer), and the itty bitty machine corporation's first hardware product is to be called the "heaven eleven," an LSI-11 with an Altair compatible bus for peripherals. (For the upper crust, there is "heaven on wheels," a van to be equipped with a "heaven eleven.") [All the quoted words in 6 SUPER CHIP! The Z 80 CPU by Zilog From The Digital Group, of course. If you are considering the purchase of an 8080-based sys- tem, look no further. The Z-80 has arrived. A new genera- tion 8080 by the same individuals who helped design the original 8080 — combining all the advantages of the 6800, 6500 and 8080 into one fantastic little chip! And, the Z-80 maintains complete compatibility with 8080 software. What's even better . . . the Z-80 is being brought to you by The Digital Group — people who understand quality and realize you expect the ultimate for your expenditure. With the Z-80, combined with the Digital Group System's video- based operation, you're at state of the art. There's no place better. Take a look at some specifications: Z-80 FEATURES • Complete compatibility with 8080A object code • 80 new instructions for a total of 158 • 696 Op codes • Extensive 16-bit arithmetic • 3 Interrupt modes (incl 8080), mode 2 provides 128 interrupt vectors • Built-in automatic dynamic memory refresh • Eleven addressing modes including: Immediate Immediate extended Page Zero Relative Extended Indexed Register Implied Register Indirect Bit Combination of above • New Instructions (highlights): Block move up to 64k bytes memory to memory Block I/O up to 256 bytes to/from memory directly String Search Direct bit manipulation • 22 Registers — 16 general purpose • 1 , 4, 8 and 1 6 bit operations DIGITAL GROUP Z-80 CPU CARD • 2k bytes 500ns static RAM • 256 bytes EPROM bootstrap loader (1702A) • 2 Direct Memory Access (DMA) channels • Hardware Interrupt controller Supports all 3 modes of interrupt Mode 2 supports 128 interrupt vectors • Data and Address bus lines drive 30 TTL loads • Z-80 runs at maximum rated speed • Single step or single instruction step • EPROM de-selectable for full 64k RAM availability (programs may start at location 0) • Complete interchangeability with Digital Group 8080A, 6800 and 6500 CPUs The Z-80 is here. And affordable. Prices for complete Digital Group systems with the Z-80 CPU start at $475. For more information, please call us or write. Now. THE DIGITAL GROUP INC. RO BOX 6528 DENVER,GO 80206 (303)861-1686 ASCII/Graphics Programmable, Multi-mode, Video Interface MERLIN IS HERE! Have you been trying to decide whether to spend your hard earned money on a fancy graphics display, or on an ASCII, alphanumeric (perhaps limited graphics) video interface? Now there is a third alternative! Get both with MERLIN the MiniTerm magician who can display your Altair or IMSAI memory in either format, or both. Of course MERLIN is plug-in compatible with both computers, and provides standard composite video output. MERLIN has a 64 character generator chip to display ASCII coded data from your memory as 40 characters by 20 lines. And by a twist of magic (software control of a mode latch), MERLIN's hardware free format "memory saver" mode starts a new line after every carriage return. Change mode again and each point on the screen: 100 vertical by 80 or 160 horizontal, is controlled by a separate memory bit. Want both? Top V lines can be ASCII data, the rest is displayed as graphics. Software control of ASCII/Graphics mode is just the beginning. Think of some of the crazy (as well as useful) things that can be done with software control of: video polarity (black/white), carriage returns (blanked/displayed), control characters (blank- ed/video inverted), and cursor (on/off). By the magic of DMA, MERLIN is super fasti Up to sixty completely different screens every second makes possible a whole new world of computer fun: computer animation! Worried about connecting your keyboard? Just plug it into MERLIN's keyboard I/O connector. Perhaps you think MERLIN is all magic and no smarts. NOT SO! Sockets and decoding for 4K ROM or 2K (2708) EPROM and our optional ROM software makes MERLIN the smartest video interface available. Our basic ROM (MBI*) contains all these keyboard editing functions for both fixed and free format modes: -Cursor Up, Down, Right, Left, and 'Home' -Delete Character or to 'End-of-Memory' -Auto and Manual Scroll -Insert and Replace Modes -4 Slave Cursor Operations -6 User Defined Functions and MONITOR routines: -HEX Dump and HEX Input -ASCII Text Input -Set Memory Display Area -Set Display Mode -Examine/Modify CPU Program Registers -Examine/Modify Memory -Memory Fill -Execute User Program with Automatic Breakpoints Our extended function ROM (MET) ) contains more editing functions, including a search routine, more MONITOR commands and graphics subroutines. MERLIN's Basic Intelli- gence comes with scratch pad RAM memory for monitor use. With a lot of magic, we at MiniTerm are able to offer this fun and exciting interface for the low price of only $249. All prepaid orders received before November 1, 1976 will receive free the MBI ROM, regularly sold separately at $34.95. A User Manual, including hardware and software details is available for $8.00 (deductible from MERLIN order). Order now and receive a free listing of LIFE which runs in 1.2K including 800 bytes for the display. Prices subject to change without notice. Mass. residents please add 5% sales tax. MiniTerm Associates Bom 268. Bedford. Man 01730 *MBI - MERLIN's Basic Intelligence MEI -MERLIN's Expanded Intelligence this paragraph are claimed as trademarks of itty bitty machine corporation.] It will be interesting to see what comes out of Evanston in the coming months. Ted closed his talk with the following very quotable passage: "Using a computer should always be easier than not using it." NCC is a hectic affair, and unfortunately I had to miss several of the other interesting technical sessions in order to work the booth. In the afternoon of June 8, David Ahl had organized a lengthy session on related topics. But the 1976 NCC in New York is merely a taste of things to come. In the planning stages, under the overall guidance of chair- person Dr Portia Isaacson, is the 1977 NCC, which will be held in Dallas TX at about the same time next year. Portia is an enthusiastic personal computing user, and is a member of the North Texas Computer Hobbyist Group in the Dallas-Fort Worth area. Her enthu- siasm for the concept that "personal com- puting is an idea whose time has come" will be reflected in the 1977 NCC program. One major interest area theme is scheduled to be that of the individual and computing. This will be reflected in the technical sessions, in programming and system design contests for amateurs and enthusiasts, and special exhi- bits. The show will be a major event on any small computer person's travel calendar for 1977. On a Subject Nearer in Time, There is Personal Computing '76 As I write this month's editorial, the final preparations for the Personal Computing '76 show are being completed by John Dilks and Dave Jones, who are the principal persons responsible for the event. The list of exhib- itors who signed up for booths as of June is shown in this month's advertisement for the show. The technical program will include numerous detailed seminars by computer users and manufacturers' representatives alike. I'll be giving an opening talk at the start of the show, and other speakers will include Steven B Gray, founder of the original Amateur Computer Society, and Ted Nelson, author of Computer Lib/ Dream Machines. I expect that, like the earlier and very success- ful shows at Trenton (Amateur Computer Group of NJ) and Cleveland (Midwest Affili- ation of Computer Clubs) this year, the Personal Computing '76 show will be like a gigantic computer club meeting and will give ample opportunity for various manufac- turers and vendors to meet potential users, Continued on page 126 Personal 7fi 1^ Computing Tft ^ Consumer Trade Fair Atlantic City, N.J. August 28th-29th Come To Personal Computing '76 And Meet Fellow Computer Enthusiasts and Suppliers in Person . . . What it's all about! AMSAT Software Development Computerized Music Micro Computers Video Terminals Hardware Development Kit Construction Disc Memories Printers Computer Comparisons Computer Games Interfacing Digital Tapes Program Implementation • Seminars and Technical talks by leading electronic equipment manufacturers • Major Exhibits from all over the country • Demonstrations in many areas including Home and Personal Computing • Door Prizes, Free Literature and Free Mementos • All this plus Sun and Surf— Fun and Excitement— Relaxation and Leisure Weekend Fair admission $5.00 advanced, $7.50 at door. Admission includes Exhibits, Seminars. Write for FREE TRIP-KIT to Personal Computing '76 Fair Headquarters, Box 1138 Boardwalk and Michigan Ave., Atlantic City, New Jersey 08404 EXHIBITION BOOTHS STILL AVAILABLE-CALL (609) 927-6950 Personal ^ compute yg Trade Fair Personal Computing '76 is your opportunity to meet representatives of many of the manufacturers you have seen advertised in BYTE. Among the products you'll get to examine at firsthand are these . . . many of the items have been committed as door prizes for the drawing which will be held at the show. And then, of course, we at BYTE will do our part toward filling the door prize pot, by contributing one lifetime subscription to BYTE beginning with issue No. 1. The first 16 issues will be delivered in a bound volume sometime in 1977, although we'll start the subscription with the current issue if the winner is not presently a subscriber. IBM Corporation will be present at the Personal Computing '76 show, to demonstrate "live" the 5100 System. This machine is a high technology combination of video display, keyboard and mass storage hardware with high technology software of a complete APL interpreter and BASIC interpreter. Evaluating its features, it is perhaps the ultimate in a small programming and applications oriented computer system. MOS Technology, 950 Rittenhouse, Norristown, PA 19401, will supply this KIM-1 board as a door prize at Personal Computing '76. iirffgj BYTE IBM Demonstration Manufacturers Cromemco [TV Dazzler] Digital Equipment Corporation Digital Group EBKA [Familiarizor] Economy Company E & L Instruments [MMDI-K] HAL Communications [MCEM-8080] Heathkit IBM Corporation Lear Siegler [ADM Kit] Microterm MITS [Altair 680 Kitl MOS Technology [KIM-1] MOSTEK [F-8 Evaluation Kit] National Multiplex Ohio Scientific [Model 300 Computer Trainer] Processor Technology [VDM Kit] Prolog RCA Laboratories Seals Electronics [8K memory board] Southwest Technical Products [6800 system kit] Sphere [310 Kit] Technical Design Labs [Z-80 CPU Board] Vector Electronics Co. Wave Mate [Wire wrap gun & wire] Williams Electronics Wintek Here is a preliminary list of exhibitors as of June 30, 1976. [Door prize offerings committed as of June 30 are in brackets following the exhibitor's name.] Stores and Retailers Computer Mart of NJ [$25 Gift Certificates] The Computer Store (Boston) [Books] Computer Store (LA) Computer Systems Center Digital Computer Services [6502 processor] Hoboken Computer Works Itty Bitty Machine Corporation [Computer Lib] NBC Imports [T-shirts] Russ Banks Computer Store SD Sales Publishers & Organizations ARRL, QST AMSAT Benwill Publications BYTE Publications [Lifetime subscription] The Computer Hobbyist Creative Computing [Books] Hayden Books Interface Microcomputer Digest Peoples Computer Company sees MOS Technology 10 Some of the Door Prizes Cromemco, home of the TV-Dazzler will supply a TV-Dazzler kit as a door prize at Personal Computing '76. You can proba- bly expect to see two or three dazzlers in operation as you walk around the show, since no product presently available so epitomizes the fascination of personal computing as this color graphics display. Southwest Technical Products Corpora- tion, 219 W. Rhapsody, San Antonio, TX will provide an SWTPC 6800 computer system kit as a door prize for the show. Processor Technology Corporation, 6200-B Hollis Street, Emeryville, CA 94608, will give out a VDM-1 module as a door prize at Personal Computing '76 which plugs directly into the Altair/ IMSAI/Polymorphics backplane bus struc- ture to produce El A video such as that shown in the monitor. E & L Instruments, 61 First Street, Derby, CT 06418 will make available one MMD-1 computer kit, shown here, as a door prize. MITS, 2450 Alamo SE, Albuquerque, NM 87106, will provide this Altair 680 in kit form to the lucky winner of one of the door prize drawings. Wave Mate, 1015 West 190th Street, Gardena CA 90248, manufacturer of a wire wrapped computer kit, will provide this wire wrap gun and unwrapping tool as a door prize at the show. This is the HAL Communications Corpora- tion's MCEM-8080 microcomputer sys- tem, a single board computer containing a monitor in 1 K bytes of ROM, and 8080-A processor, 1 K bytes of programmable memory and system buffering. HAL Communications, 807 East Green Street, Box 365, Urbana, IL 61801 will provide an MCEM-8080 as a door prize at the Personal Computing '76 Show. Ohio Scientific Instruments, 11679 Street, Hiram, OH will provide a Model 300 Computer Trainer as a door prize for Personal Computing '76. MJB Research & Development Corpora- tion's contribution to the stack of door prizes at Personal Computing '76 will be this 8K Altair compatible "Seals" memory board. MJB is located at 36 W 62nd Street, New York, NY 10023. 11 Letters It's about time somebody jumped in with a word or two in favor of sanity and rationality in programming style. STRUCTURE'S WHERE IT'S AT! In regard to Ronald Herman's article [page 22, June 1976 BYTE] on "Program- ming for the Beginner:" Right On!! I for one am fed up with articles and letters of the "my code is two bytes shorter than yours" variety. It's about time somebody jumped in with a word or two in favor of sanity and rationality in programming style. While the techniques Mr Herman presents are by no means new, their acceptance among pro- grammers of smaller systems is shall we say not as widespread as one might wish. This is detrimental not only to the individual prac- titioner of the "dirty tricks" school of programming, but to the home computing community as a whole, for such practices can severely restrict the utility and share- ability of the software produced, and thereby work to defeat the purpose of hobbyist software interchange standards. I think that to a large extent it is up to such people as the editors of BYTE to encourage neophyte programmers to develop structured, top-down programming practices rather than bit-pinching, memory-grudging trickery. Novices in particular should be warned that code of the latter type can be nearly impossible to debug, and just try and understand it a year from now! Since you, the editors, have been pushing for standard- ization of various sorts, I think that it would not be too unreasonable for you to exercise a little discretion as to what sort of program- ming style is advocated in the articles and letters you select for publication. I might also suggest that software-related articles include metalanguage descriptions of the algorithms involved, similar to Mr Herman's pseudo code. For those old-timers already past the point of no return, by all means don't let me interfere with your work. If the "quick and dirty" approach to coding is your bag, then go right ahead. Just don't ask me to debug it for you, and please, please don't tempt neophytes down your primrose path. Gregory P Kusnick 3532 Ramona Palo Alto CA 94306 P.S. In case you haven't figured this out yet, all my BOMB points for this month go to Ronald Herman. We're all for structured programming, just surprised at how long it took for someone to write an article on the subject. Ron Herman's article shows a very useful tech- nique for organizing one's programming thoughts. Let it be known: Articles which use a pseudo code representation for pro- grams are highly desirable. Of course, in the cases where what might be called a "dirty trick" is required, we can always partition the problem so that the tricks are off isolated in some subroutine. DISPLAY WANTED I recently picked up the May and June issues of BYTE at the "Rochester Hamfest" at Rochester NY. I was very impressed with BYTE as it appears to be an excellent magazine for the "computer hobbyist" or "ham RTTY operator." I would like to see an article on a 72 character per line TV display which would then be compatible with Teletype line lengths such as the model 32 and 33s, etc. Vincent R Staffo Rochester NY ATTENTION HAMS! REQUEST FOR A HAM NETWORK I am a "charter subscriber" to BYTE and have been in and around the radio/ electronics business for quite a while, since 1941 in fact. I have an Amateur Extra Class license and operate all bands, SSB, CW and RTTY. I am also CE for a St Louis direc- tional AM and stereo FM station (20 years). It seems to me that the opportunities in the microprocessor field are virtually unlimited but also that the pitfalls are of the same order. I also believe that a large number of your readers must also be hams and RTTYers. I would like to see BYTE magazine promote a net type of operation on the ham bands to promote the exchange of information regarding microprocessor systems and peripherals. A few minutes of Continued on page 93 12 If you thought a rugged, professional yet affordable computer didn't exist, think IMSAI 8080. Sure there are other commercial, high-quality computers that can perform like the 8080. But their prices are 5 times as high. There is a rugged, reliable, industrial com- puter, with high commercial-type performance. The IMSAI 8080. Fully assembled, it's $931. Unassembled, it's $599. And ours is available now. In our case, you can tell a computer by its cabinet. The IMSAI 8080 is made for commer- cial users. And it looks it. Inside and out! The cabinet is attractive, heavy-gauge aluminum. The heavy-duty lucite front panel has an extra 8 program controlled LED's. It plugs directly into the Mother Board without a wire harness. And rugged commercial grade paddle switches that are backed up by reliable debouncing circuits. But higher aesthetics on the outside is only the beginning. The guts of the IMSAI 8080 is where its true beauty lies. The 8080 is optionally expandable to a substantial system with 22 card slots in a single printed circuit board. And the durable card cage is made of commercial-grade anodized aluminum. The IMSAI 8080 power supply produces a true 28 amp current, enough to power a full system. You can expand to a powerful system with 64K of memory, plus a floppy disk con- troller, with its own on-board 8080-and a DOS. A floppy disk drive, an audio tape cassette input device, a printer, plus a video terminal and a teleprinter. These peripherals will function with an 8-level priority interrupt system. IMSAI BASIC software is avail- able in 4K, that you can get in PROM. And a new $139 4K RAM board with software IMSAI S0S0 .„— KX-— **"* memory protect. For the ultimate in flexibility, you can design the system for low-cost multiprocessor, shared memory capability. Find out more about the computer you thought didn't exist. Get a complete illustrated brochure describing the IMSAI 8080, options, peripherals, soft- ware, prices and specifications. Send one dollar to cover handling. Call us for the name of the IMSAI dealer nearest you. Dealer inquiries invited. m IMS Associates, Inc. B-9 14860 Wicks Boulevard San Leandro, CA 94577 (415) 483-2093 New Intel microcom system costs, increase Intel has two new LSI components for the MCS-40™ microcomputer system which will help you cut system costs, increase throughput and reduce the num- ber of components you have to stock for I/O interface requirements. The new Intel 4269 Programmable Keyboard Display and the 4265 Programmable General Pur- pose I/O devices eliminate the large number of discrete SSI/MSI components previously required for keyboard, control panel, indicator array, alphanumeric dis- play, printer, communications and other I/O interfaces. These new LSI parts in- crease system throughput up to 50%, and make it easy to add standard Intel memory and system peripherals. The 4269 Keyboard Display can be software programmed to interface to vari- ous keyboard and display elements and makes it possible for you to eliminate fifteen or more discrete components. It significantly increases system throughput since it performs the scan, storage, refresh, and other simultaneous keyboard/display tasks previously required of the 4004 or 4040 CPU. When programmed as a keyboard or line sensor input interface, the 4269 can scan up to 64 key closures or lines. When a key closure is detected, the 4269 generates a system interrupt and stores up to eight characters in its first-in/first-out buffer before requiring CPU service. In alphanumeric applications, the 4269 eliminates the need to use the CPU Sell-Scan is a registered trademark of the Burroughs Corporation puter I/O devices cut throughput up to 50°/° and system memory for display refresh since the necessary memory and control are built in. One 4269 can operate and refresh alphanumeric displays or indicator arrays with up to 32x4 digits, 16x8 charac- ters or any configuration of 128 elements or lights, including a 20-character Burroughs Self-Scan* Display The 4265 General Purpose Program- mable I/O is ideally suited to implement custom interface requirements. Up to four devices can be controlled by the CPU. Each 4265 has 16 I/O lines organ- ized into four ports which can be used in 14 different data transfer and control/ interface organizations. The 4265 provides synchronous/asynchronous control, buffer inputs and outputs, bit set and bit reset capability on output port lines- and byte transfer control. It can be used to add in- dustry standard RAM memory such as Intel's 5101 CMOS RAM. And the 4265 lets you use system peripherals such as the 8251 Programmable Communications Interface (USART), the 8253 Program- mable Interval Timer or the 8214 Priority Interrupt Control Unit. To order, contact our franchised distributors: Almac/Stroum, Components Specialties, Components Plus, Cramer, Elmar, Hamilton/Avnet, Industrial Com- ponents, Liberty, Pioneer, Sheridan or L.A. Varah. For your copy of our MCS-40™ System brochure, use the bingo card or write: Intel Corporation, 3065 Bowers Avenue, Santa Clara, California 95051. intJ Microcomputers^^ First from the beginning. Are you the proud author of a piece of hobbyist software? If so, you are in the same class as the author of a novel, a play or any other kind of salable writing. Are You an Author? Calvin N Mooers Rockford Research Inc 140 1/2 Mt Auburn St Cambridge MA 02138 Softlifting is a white collar (no gun) crime which is easy to commit and hard to detect. Are you the proud author of a piece of hobbyist software? If so, you are in the same class as the author of a novel, a play or any other kind of salable writing. If your soft- ware is good, and other people want it, it could be worth something to you. Dollars! Money! This is the first of several articles in BYTE describing details of an owner's rights in computer software. It is written from the hobbyist and software writer's standpoint. While I am not a lawyer with a formal legal degree, I have some practical credentials for discussing these matters. I have 30 years experience in studying this topic and in advising my lawyers concerning my own patent, trademark and software copyright problems. I have previously written on this subject as it concerns the professional data processing markets (in particular see my article "Computer Software and Copyright" in the March 1975 issue of the ACM Computing Surveys). Any lawyers or indi- viduals who read my views on the subject and have comments to make are invited to respond in writing to me or via the BYTE letters column. Maybe you are not yet an author, but only a user of personal computing software. Then you, like everyone else, need more and better software in order to use and enjoy your computer. Yet where are the suppliers? Why do some of the potential suppliers seem to be holding back? There is a partial answer to this question. You undoubtedly know that a few bad apples are rapidly giving all computer hobby- ists a very bad name. For example, it now appears that more copies of Altair's BASIC have been pirated than have been legally sold. (See the letter by Bill Gates on page 3 of the February 1976 edition of MITS Computer Notes, the March April 1976 issue of People's Computer Company and widely published elsewhere in newsletters and club bulletins.) Software piracy is a white collar (no gun) type of crime. It is easy to commit and hard to detect. As a crime it is in the same class as shoplifting, or the use of a "blue box" on a telephone to make illegal freebie worldwide telephone calls. Software piracy is a crime ethically because it extracts creativity and effort from the author(s) of software against their will and thereby robs them of their property. It is a crime legally to the extent that existing legal mechanisms are available for the protection of software by owners who desire some form of recompense through sales. As a software user who has come by his or her software honestly, what can you do with your software? What can you not do? From my experience talking to many people, I have concluded that very few persons really know what they can do and cannot do within the present legal defini- tions. There is much misinformation and little real knowledge. One target of this article is you who are software users. Furthermore, it is you — the great majority of honest users — who will by your 16 A Note of Interest The concern with protection of software creations is by no means con- fined to the personal computing field. A t about the time this article was being edited, a survey entitled "Development of an International System for Legal Protection of Computer Programs" by Oliver R Smoot appeared in the April 1976 edition of Communications of the ACM, page 171 of the volume 19 number 4 issue. The content of the report was an informal account of a recent (June 1975) meeting of an international committee named the Advi- sory Group of Non-Governmental Experts on the Protection of Computer Programs, held under the auspices of the World Intellectual Property Organ- ization in Geneva, Switzerland. . . CH peer pressure provide the most effective way for putting a stop to the bad apples who steal software. If the software piracy threat can be stopped, more and better software on the market will be the result. Methods of Protection So you are an author, and you have this great little piece of hobby software (or business software). It is so new, it is still a secret between you and your computer. Even your best friend hasn't been provided with a copy. It is all yours. (We presume that this software was created in your own basement, and not on your company's time or computer. We pre- sume that your business arrangement with your employer allows you to hold ownership in your own out-of-hours software creations. (Maybe you had better dig out that copy of your employment contract, and read the fine print on this matter.) We also presume that your creation wasn't copied from some- one else's copyrighted software or documentation.) For the moment this new software is all yours, and you legally and completely own it. The courts will back you up to the hilt. So much for the good news. Now for the bad news. Exactly what is it that your own? Should you try to protect your new software? If so, how? How can you take your software out of your base- ment without losing your ownership? If you can find a buyer, what is it that you really sell? What steps (patent, trademark, copy- right, trade secret, or other method) should you take to protect your new property? The easiest way out is for you to give your software away, thereby forfeiting ownership. You won't have any problems as an owner. For some kinds of hobby soft- ware, this is the preferred course. After all, a hobby is mainly for the fun of the thing, and you don't really expect to make any money. But what if you really did put in an awful lot of time, and worked up some documen- tation, got all the bugs out, and have something that you think others would really like to pay some money for. What then? If you can find a buyer for your software, someone who is willing to purchase all rights to your software, sight-unseen, for some nice round number, then your worries are also completely over. The buyer can worry about protecting it, and selling it. However, most buyers will want to examine the goods before buying, so you are back to where we began: If you want to sell your software creations, how do you protect your prop- erty before and after the sale? Thus we get down to basics. Secrecy If you don't let your software out of your basement, and you don't let anyone else see or have access to it, even by data line, and you tell no one about it, then you are probably completely protected (barring a computer-oriented burglary). This is the method of protection by secrecy. It is completely effective. The best people do it: IBM is reputed to have many more secret developments filed away in their labs than all they have ever published or marketed. Can the "idea" of your new software be protected? The answer is clearly "No," particularly if the software is to be marketed to a number of customers. Forget it. Patent Can the new software be patented? This method of software protection might seem to be a hopeful way, since a patent protects the processes or devices used to carry out an When you create or pur- chase software, exactly what is it that you own? The easiest way out of software protection prob- lems is for you to give your software away, thereby forfeiting owner- ship. This is guaranteed to cure any problems you may have as an owner. For some kinds of software this is the preferred course. After all, a hobby is mainly for the fun of the thing and you don't really expect to make any money. 17 With software, trade secret protection is not likely. You simply cannot sell copies of the secret and keep the secret at the same time. In my estimation, the best tool we have is copyright, which is the same legal tool used by all other authors — authors of novels, plays, and all other kinds of creative written works. inventive new idea. In practice, the answer is again "No." There are two reasons. The first is that your software is almost certainly not sufficiently original in concept to be patent- able. The second is that during the past ten years the courts — including the Supreme Court — have had as much trouble in agreeing about how to deal with software patents as they have had with the equally intriguing topic of pornography (What is it? Should it be allowed?). Finally, getting a patent will cost you an arm and a leg (more than $1000), and will take a minimum of two to three years (if ever) to get. Again, forget it. Let the big corporations fight this battle. Trade Secret If you are going to sell your software to more than one customer for hobby com- puter use, you can also forget the "trade secret" method of protection. This method works for large companies if it is a manufac- turing process or formula that can be kept behind locked doors (like the formula for Coca Cola). But with software, you simply cannot sell copies of the secret, and keep the secret at the same time. Trademarks Trademarks are another fascinating legal device for your protection as an entre- peneur. Trademark laws protect your use of a special mark (your trademark) on your goods or services. The purpose of your trademark on your software is to inform the buying public that the goods or services so marked and sold are manufactured or pro- vided by you, and not by someone else. If you are interested in the game of software selling, you should seriously consider using a trademark (or service mark) to help protect you from unfair imitators, since there are legal sanctions to prevent them from using your mark. However, useful as it is, a trademark cannot be used to protect the software itself from theft. Copyright How can your new software be sold, and still be protected from "soft-lifting" (equiva- lent to "shoplifting" in another context)? How can it be protected from the pirates? In my estimation, the best tool we have is copyright, which is the same legal tool used by all other authors — authors of novels, plays, and other kinds of creative written works. Copyright is unbelievably swift and cheap. What you do is to place the magic incantation "Copyright 1976 J Jones" (if your name is J Jones) at the top of the first page or title page of your software listing, and then give a copy so marked to a friend. You now have a copyright! It is like magic. The very instant that you place your program, or listing, or tape, or documentation on sale or put it into distri- bution with this notice on it you become the proud owner of a US copyright in the software so marked. You do not need to file papers anywhere to obtain your legal copyright protection! (However, more about this topic later, and about filing a copyright claim in the US Copyright Office.) However, if you first distribute any copies of your software without this copy- right notice, then you have lost your rights forever. By first distributing your software without a copyright notice, you thereby tell the world that you renounce your owner- ship, and that anyone thereafter may copy your software at any time with no need for permission. It is best if the notice "Copyright 1976 J Jones" (with the correct name and date) is placed in a comment line at the head of the program. It should also be stamped or handwritten on all tapes and boxes contain- ing cards or tapes for the software. It is important that it be placed on the title page of all documentation. All copies, what- soever, going out should bear your copyright notice. What Copyright Means A copyright means that no one, without your permission, is legally authorized to make copies of your copyrighted software. In the language of the law, you now have: "the exclusive right Lo print, reprint, publish, copy, and vend the copy- righted work; to translate the work into other languages or dialects, or to make any other version thereof . . . Since one can't run a computer without first using a copy of the software to make a data pattern inside the computer, you can begin to see how copyright can protect you. 18 ICCIDI JOPTW iii > II i" L' in' Introducing SCELBAL, the new microcomputer language that's simpler than machine language. A complete language for "8008'7"8080" systems including source listings, routines, flow charts and more! SCELBAL. scientific ELementary BAsic Language for "8008"/"8080" systems. A complete, illustrated program book. Routines. Techniques. Source Listings. Flow Charts. And more. Took several years to develop. Now yours for many years to come. First time that intimate details of higher level language has been offered for such a low price. Only $49! You get 5 Commands: SCR, LIST, RUN, SAVE, LOAD. 14 Statements: REM, LET, IF . . . THEN, GOTO, FOR with STEP, END, INPUT, PRINT, NEXT, GOSUB, RETURN and optional DIM. 7 Functions: INT, SGN, ABS, SQT-i, RND, CHR, TAB. And, it runs in 8K and more. Here's all the data needed to customize a high level language for your system ... at a fraction of the cost! Order your copy today! Get $^ Q started advancing your system! ppd. GAMES ■.•■• £»»*«»" Here's SCELBI's First Book of Computer Games for the 8008/8080. Action-packed. And fun. Try to beat the computer at its own game. Here's the first complete machine language i computer manual for computer games to \ include source listings, flow charts, | routines and more. Space Capture — You \ against the computer using "search and S destroy" strategy to shoot down roaming \ alien spaceships in outerspace. Hexpawn \ — a mini-chess game that lets the »"' computer make mistakes . . . but only i once. Hangman — an updated version \ of the great kid game. Computer selects | words at random from long, expandable list. Try to beat it in 8 moves or less. Illustrated. Fun extras to put your computer to challenging, competitive, fun use. _ . ... \A 95 rW i Order yours today! ppd. SCELBI's new microcomputer Game Book of Outer Space . . . Captain your own crusading starship against the logic of your "8008" or "8080". You must destroy a random number of alien ships without running out of stardates, out of fuel, out of ammunition or out of the galaxy. Plan your mission. How much fuel is used for your warp factor? Don't run into roaming stars that can damage your ship. Suddenly! Condition Red! Alien In sight! How big is he? Fire a phasor or torpedo! He's damaged or destroyed. But, you've used valuable fuel. That's Just the beginning. A new game every time. Complete program book in machine language for 4K memory, including source listings, flow charts, routines, etc. Great intergalactic adventure and fun. Order "GALAXY" today! 14 95 PPd- G4MXY '"in umn,..™ *■■ "8080" SOFTWARE MANUALS Three new basic, com- plete "MUST" manuals! "8080" Assembler Pro- gram operates easily in 4K bytes of RAM (includ- ing symbol table). Unique feature: How to accept mnemonics related to "8008" based machines on "8080". Includes all major routines, pertinent flow charts, highly com- mented assembled listing and more. $17.95. "8080" Editor Program identical to "8008" Editor, with machine codes for "8080". $14.95. "8080" Monitor Routines same functions as "6008" specifically developed to utilize expanded capabilities of "8030". $11.95. Tat, aur "v Ba 14 95 ppd. SAVE $5.35! BUY ALL 3 11 95 ppd. FOR ONLY $39.50! MACHINE LANGUAGE «®lm^ 1 19 95 p P d. PROGRAMMING FOR THE "8008" (and similar microcomputers) Here's the detailed, basic manual you need to develop today's machine language programs. 170 pages. Illustrated. Easy- to-read, understand. Most techniques applicable to other micro-computers, Including "8080". Floating-point arith- metic package is pap worth the price alonel Order todayl Detailed presentation of "8008" codes • Flow Charts Mapping • Floating-point Package • Debugging Basic programs: loops, counters, masks Organizing Tables • Editing/Assembling Math operations • I/O, Real Time Programming Maximizing memories • And lots more. Master Charge, Postal and Bank Money Orders preferred. Personal checks delay shipping up to 4 weeks. Pricing, specifications, availability subject to change without notice. Prices for U.S. and Canadian delivery at book mailing rate. Add $2.50 for each publication If Priority Air Service (U.S.) desired. Foreign orders add $6.00 for each publication. ICELBI COMPUTER CONSUMING 1322 Rear Boston Post Rd., Milford, CT 06460 Telephone: 203/874-1573 The best way to explain what this language of the copyright law means is to describe what you as the purchaser of the software can and cannot do with copy- righted software if you wish to stay within the law. After you have bought the copyrighted software, you may read your copy, throw it away, re-sell it, give it to a friend, memorize it, burn it — or do just about anything except to "make a copy." You own the paper it is written on, you own this particular copy of a program; but you don't have the legal right to make further copies! This is what copy- right is all about. Of course, computers were not with us in 1909 when the current copyright law was written. But even back in 1909 they had "high technology" for the time— linotypes and high speed printing presses. Our present computers are merely another form of high technology machines, and they also use and produce printed material. The copyright law applies to computers too. Making a computer listing is both making a "copy" and "printing" or "reprinting" copies of a program in the language of the copyright law. Giving a listing to a buddy is "publishing," even if no money is involved in the act. Selling the listing, say for 50R -\ LATCH CONTROL 7 SEG. TO BCD CALCULATOR CHIP BCD TO COMPUTER ) INF i p S,0. p s. 0. DECODE RS >B2 >B3{ INPUT PORT l P ' S > O 26 Figure 2: Memory formats of the Mathematical Function Unit data. When transferring data from the calculator to the microprocessor's main memory, one byte at a time is read, starting with the algebraic sign. A natural way to store the coded numbers read is in the form of 12 bytes in ascending order in the address space of your computer. Each byte's low order nybble is a BCD number in the magnitude positions (Xs or Ys in the figure). The high order portion of each byte contains the content of the decimal point, sign and overflow bit lines at the time the byte is read from the calculator. For output to the Mathematical Function Unit, the low order bits of a byte are used to drive the 6 key selection lines CO to C5. ± X X X X X x,x X 1 1 1 1 1 1 1 + Y Y 4 5 Contents Address offset (hexadecimal) ■ Magnitude of exponent -Sign of exponent -Magnitude of number -Algebraic sign of number and output lines. Although not shown in the schematic diagrams, my version included an internal power supply, so the connections to the microcomputer are limited to signal and ground lines. Any 8, 12, or 16 bit machine's input and output ports can potentially be used with this interface. The basic operations of the Mathematical Function Unit consist of the input of a code to be interpreted as a "function desired," the processing or calculating required to perform that "function," the decoding and output of the result, and the internal timing needed for control. The functional block diagram of figure 1 shows how these sections are related, and provides a basic knowledge of the internal operation of the Mathematical Function Unit. Input Section The input to the Mathematical Function Unit from an external device such as a microprocessor consists of 8 lines from an output port of that device. These lines are labeled X, Y, Cq, C-j, C2, C3, C4 and C5. The input section stores the new data supplied, and decodes this to the "function desired." See table 1 for a complete list of the functions and their codes. The function is applied to the calculator chip in the form of the correct "pushed button." (Since this is all done electronically, the pushing of buttons is simulated using solid state switches, and no push buttons really exist.) The X line is used to distinguish new data from old. As this line is raised from logic level to 1, the data on lines Cq to C5 is Byte Format: Calculator Outputs R O P S B3 B2 B1 BO I I I 7 6 5 4 3 2 1 Wired to MFU pin BCD digit -Sign bit -Decimal point bit -Overflow bit -Ready Bit Byte Format: Calculator Inputs C5 C4 C3 C2 C1 X Y 5 4 3 2 1 CO Wired to MFU pin Calculator function code see table 1) Calculator Control ACKNOWLEDGEMENTS I would like to thank J C Hertsch of MOS Technology, Inc. for his assistance by sup- plying information and dona- ting the calculator chip used in this project, which was carried out under the auspices of California Polytechnic State University, San Luis Obispo. 27 Figure 3: Schematic Diagram of the Mathematical Function Unit. A total of 25 integrated circuits is required to accomplish the floating point and mathematical functions of a scientific calculator. 2 TTL LOADS 7 TTL LOADS 2 TTL LOADS PER LINE Integrated Circuit Summary (or Figure 3 ■ Typ« Pim +5 V ♦ 7.5 V GND ICl 74123 16 16 8 IC2 7402 14 14 7 IC3 7475 16 5 12 IC4 7475 16 5 12 IC5 74155 16 16 8 IC6 74154 24 24 12 IC7 7405 14 14 7 IC8 7406 14 14 7 IC9 7406 14 14 7 ICIO 7492 14 5 10 IC11 MM5616 14 14 7 IC12 MM5616 14 14 7 ICl 3 MM5616 14 14 7 IC14 MM5616 14 14 7 IC15 MM5610 16 1 16 8 IC16 MM5610 16 1 16 8 IC17 74150 74 24 12 IC18 MPS7529-103 28 28 5 ICl 9 74123 16 16 8 IC20 7402 14 14 7 IC21 7404 14 14 7 IC22 7400 14 14 7 IC23 7400 14 14 7 IC24 7402 14 14 7 IC25 7410 14 14 7 IC26 7400 14 14 7 IC27 MM5610 16 1 16 8 IC2B MM5610 16 1 16 8 IC29 7476 16 5 12 IC30 7475 16 5 12 R22-29 4.7K.I/IW accepted as new information, and gated into the input buffer. After this data has been accepted, the data on the C lines is ignored until the next X line transition from to 1. Trvs Y line is used to determine whether an input or an output of information is to be performed by the Mathematical Function Unit. A logic 1 on this line indicates an input operation, while a logic indicates that an output of information is to occur. Input lines Cq through C5 are used to convey the codes for the different functions from the controlling device to the MFU input circuitry. A unique combination of and 1 levels on these lines at input time is taken as a "key pressed" code. It may be noted that 64 total combinations are pos- sible with these 6 input lines; however, only 40 combinations are used, with the other 24 codes being invalid. These C lines are not used during the output state of the Mathe- matical Function Unit, when Y is low. Processing Section The processing of the required function is done by a large scale integration single chip, 40 key scientific calculator array, (MPS 7529-103) made by MOS Technology, Inc. This calculator chip has roughly the same set of available functions as some of the more sophisticated non programmable hand held calculators on the market today. When used 28 IC2IB 7404 -pcA- MM3EI0 7 SECTIONS (SEE NOTE I) IC27 IC2B + 5V C4 6 - 8 / iF +5V T [-)(— ♦ f£ w» * |S 1 14 R7 RB 15 20K 10K TRIM CLR ICI9A 74123 22D b— 7402 'T-SIOpF 1 y 7400 " 7400 r^OE)^ liE>- : III N 7402 't$™y *- s \ — v* 10 "cVj- IC2IE 7404 lf^- IC 12, J 400 ' 1 V B IC2IA 7404 7402 j J ZtOo^ 1 Ih IC29 7475 IC30 7475 OUTPUTS TO COMPUTER I I I I I I I I S SIGN BO Y ACTIVE LOW KEY PRESSED LINE KEY RELEASED LINE 1 Sh 1 READY 1 1 MFU BUSY I 1 TO Tl T4 Tf Figure 4: Mathematical Function Unit input timing sequence. This diagram shows typical relative timing of several signals during an input operation: • Tg is the time of an X line transition from to 1. • T] is 1.5 fjs after Tq. The data must be stable from Tq until after Tj. • 7"2 Is 300 /us after Tq. At this time, the ready flip flop is reset. • Tj is 50 ms after Tq. At this time, key pressed is reset, key released is set. • 7^ is 100 ms after Tq. At this time, key released is reset. • Tf is the delay until the calculator is again ready. The actual time interval depends upon the calculator function selected. OUTPUT FROM MFU (ONE DIGIT ONLY) X Y STATE IRRELEVANT LOW ALWAYS LATCH INPUT DATA HIGH ALWAYS— DATA IGNORED SET NOT READY KFY PRFS^FP INACTIVE LINE KEY RELEASED INACTIVE LINE 1 SET READY J MFU BUSY 1 1 T2 Figure 5: Mathematical Function Unit output timing sequence. This diagram shows typical relative timing of several signals during an output operation: • Tq is the time of an X line transition from Otol. • Tj is shown to indicate that no data latch pulse occurs in this mode. • 7j> Is 300 us after Tq. At this time, the ready flip flop is reset. • Tf is the delay until the calculator is ready again, the maximum time before a digit is available in the output buffers. • Trig functions (sine, cosine, tangent) • Inverse trig functions (arc sine, arc cosine, arc tangent) • Logarithms (Ln, Log) • Anti-logarithms (e x , and 10 x ) • Exponentiation (Y x ) • Factorials (N!) _ • Convenience Functions (1/X, X ,VX, Pi) • Full feature memory (store, recall, sum) • Exchange operation (X **• Y) • Degree or radian selection for trig functions • Automatic error detection • Clearing operations (clear entry, clear all) The calculation range includes positive or negative numbers with absolute values be- tween 1X10,-" and 9.999999X1 99 . Any number in this range may be entered and all results must fall within this range or an overflow will be indicated. The output format of the calculator chip consists of 12 digit positions organized as shown in figure 2. Each output digit oc- cupies one byte of memory when the micro- processor reads information from the Mathe- matical Function Unit. The expected decimal point will be indi- cated in one of the digit locations 1 through 8, and a decimal point will be indicated in digit location if the calculator chip's degree radian mode has been set to the radian mode. Output Section The output section of the Mathematical Function Unit is connected to the control- ling processor through 8 output lines to an 8 bit input port. The output section is respon- sible for the decoding of the data supplied by the calculator chip after the required actions have been completed. The output section also generates the correct sequence for information presented to the controlling computer. A handshaking signal is provided by the ready (R) line. This line is at a logic 1 level when the Mathematical Function Unit is not performing any input output or calculation operations. This line is used as a signal to the controlling computer as to the status of the slave. The ready line could be used to generate an interrupt upon completion of the calculations, or it could be connected directly to an input port line which would be polled until the Mathematical Function Unit has set it high indicating completion of its tasks. 30 The other 7 lines are data lines to the controlling computer and contain the infor- mation normally seen on the display of a calculator. The B lines contain one BCD digit of the normally displayed number, while the (overflow), S (sign), P (decimal point) lines contain other necessary informa- tion. The unit is designed to output one digit per request, where a request consists of a transition from a logic to a 1 on input X line while input Y line is held at a logic level. This means that only one digit is transferred at a time, slowing down the maximum speed of the system. This greatly simplifies both the supporting hardware and software handling of the 12 digits of the "displayed" number which is sent to the computer. These 12 digits are generally loaded into the controlling computer's main memory in 12 sequential locations. This leads to the question of using a direct memory access operation to transfer this data. Due to the small amount of data (12 bytes), the calcu- lator chip's slow speed, and the added hardware required, using direct memory access for the loading of the generated information would probably not be efficient. The overflow line is high (logic 1) if the digit displayed exceeds the capacity of the calculator chip. The sign line is high if the digit position contains a negative sign, at which time the B lines are invalid. The decimal point line is high if a decimal point accompanies the digit on the BCD lines, and positionally goes to the right of the digit. The output of the calculator chip is in seven segment notation and the decoding of •this to the MFU's output format of BCD is done by ICs 20b, 21c and e, 22b and c, 23, 24, 25, and 26c, as shown in the schematic diagram of figure 3. This decoder circuit Table 1. Hexadecimal Codes for the Mathematical Function Unit operations. The low order six bits of an 8 bit byte determine the function presented to the Mathematical Function Unit according to this table. On hand calculators, these functions correspond to the mnemonics of the keytops. A simple "program" for the calculator would be a string of bytes sent one by one with meaningful selection of these operation codes, followed by reading the outputs, formatting them and displaying them on a TV typewriter or Teletype. Hex Code 00 01 02 03 04 05 06 07 08 09 0A 0B 10 11 12 13 14 15 16 17 18 19 1A 1B 20 21 22 23 24 25 26 27 28 29 2A 2B 30 31 32 33 34 Function Zero (0) One (1) Two (2) Three (3) Four (4) Five (5) Six (6) Seven (7) Eight (8) Nine (9) Arc Function Display Restore Decimal Point Add Subtract Multiply Divide Y to the X power Equals Left Parenthesis Right Parenthesis PI (3.1415927) Change Sign Enter Exponent Sine Cosine Tangent Natural Log (In) Log (base 10) Square Root Recall From Memory Add to Memory Swap X with Y Degree — Radians Store in Memory Clear Entry - Clear All 1/X Inverse X2 10 x e x N! Factorial (AM other Hex codes are invalid) n n n R i 0l P ' S < BOi Bl ' B2' 83' ■=■0" " c = 1 - 13 R F 5 ( R i 7 If \ \K 1 C 13 IC 27 CI4 n . -C3-.. -I+ \- 5' r\c \\ LI | IC22 | | IC 20 X IC2-| | IC 1 IC 18 IC 29 Y »« i. I ijc, 2 lC5 'C4 'C3 IC 3 1 IC 5 W 1 IC 7 IC II IC 28 [ IC 23 1 1 IC25 _ fl 1 ™ .- 1 ' CHE 1. '<- lb 1 C2 IC 8 IC 12 C 9 y IC 30 'CI 'CO • IC 4 IC 6 CIO |.IC2I | |. IC26 DC7 IC 17 IC 9 IC 13 (3 N GND IC 10 ') l.'C24 | A © |,RP2 J 1 C 14 ] Figure 6: Parts placement in the author's prototype of the Mathematical Func- tion Unit. The unit was constructed on a piece of Vector P pattern Vector- board (.1 inch grid, 2.54 mm grid) as depicted in photo I, with this layout. 31 Photo 1 : The physical assembly of the prototype Mathematical Function Unit. A multiple conductor ribbon cable is used to route ground and signal information to the microprocessor system which drives the Mathematical Function Unit through a parallel 10 port. A separate power supply (not shown in the schematics of this article) was built into the box. interprets a blanked digit position as a zero, so all digit positions contain a digit, overflow symbol, or negative sign with decimal points included when applicable. Timing and Control The basic timing and control problem for the Mathematical Function Unit is to pre- vent the external device from overrunning the unit with information, holding signals for the required length of time, controlling the input and output buffers, and control- ling the ready flip flop used for handshaking. The timing pulses are generated by a series of monostable multivibrators, and the ready flip flop is made of NOR Gates, IC 2a, and 2b in figure 3. A transition from a logic to a logic 1 level on the X input line is responsible for initiating both the input and output se- quences. These two sequences are deter- mined by the state of the Y input line, where a 1 signifies the input procedure, while a logic means an output of informa- tion is to be performed. Input Timing Sequence The normal environment of the calculator chip is in a hand held calculator with a human operator pushing the buttons. This allows the calculator enough time to scan the keyboard several times, determining whether a key is being pressed, or if a noise spike on the line caused an unwanted pulse during a couple of scan times. This is the method used by many calculator chips for debouncing the push buttons used. The calculator chip used in this project requires about 40 ms for a pressed key to be recognized. (About 7 keyboard scan times.) This 40 ms delay is virtually impossible for a human hand to beat, assuring a key will be recognized every time a button is pushed. There is always going to be a sufficient delay between different key pressings due to the Note: The author and two friends have gotten together in order to make a printed circuit board available for this design. The product is a two layer board with plated through holes, and is designed to be compatible with the Altair 8800 or IMSAI computers, interfacing through an 10 port. The price is quoted as $24.95 plus $1.23 for postage and handling. California residents please add 6% sales tax. Write RSG Electronics, PO Box 13, Santa Margarita CA 93453. (Price is subject to change without notice.) 32 slow human controller; however, all of these delay times do not necessarily hold true when interfacing with a much faster control- ling device, such as a microcomputer. This requires that a timing network be imple- mented to insure that the calculator chip receives the proper signals in the proper sequence, with the proper delays. The "key pressed" delay is provided by monostable multivibrator, IC lb, and is adjustable by R6. When this 40 to 50 ms delay is completed, IC 19a, also a mono- stable multivibrator, is triggered as a "key released" delay providing the system with a short delay between key pressings. These two delays form the minimum time required for the Mathematical Function Unit to become ready for the next sequence; how- ever, for some of the more time consuming functions such as the trigonometric, factorial and logarithmic functions, the calculator would not be finished after the two delays had passed. To insure calculations are com- pleted before setting the Mathematical Func- tion Unit state to "Ready," both delays must be completed and a decimal point be sensed by the output circuitry. Since a decimal point is the only character present in all output displays, and is not present until all calculations are complete, sensing the decimal point indicates end of calcula- tion. (The gates used for detection of the decimal include 20a, 21a and b, 22a and d, and 26a and b in figure 3.) When these requirements are met, a condition is placed on the ready flip flop, setting it to the "Ready" state. The timing signals for the input sequence are shown in figure 4. The length of the delay between T4 and Tf (of input routine; see figure 4) will depend on how the calculator chip's internal scan timing coincides with the surrounding hardware. For the 7529-103 calculator chip used in this project, this delay will not exceed 3.3 ms after the calculations or required actions are complete. Output Timing Sequence The output sequence is specified by placing a logic level on the Y input line. This low level inhibits the operation of the key pressed and key released delays which are not needed for output. The X line transitions are used to clock a counter, IC 10, which with IC 17 selects the next digit to be placed in the output buffers. This digit is decoded as previously mentioned, and latched in the buffers while the ready flip flop is set to "Ready." The next digit is found by pulsing the X line again while keeping the Y line low. The Y line must be kept low during the entire output procedure since a high state on this line resets the counter, which will then point to the first digit again. A pictorial description of the output timing signals is shown as figure 5. The length of the delay between T2 and Tf will depend on how the calculator chip's internal scan timing coincides with the surrounding hardware. This delay will not exceed 3.3 ms for the calculator chip used in this project. TTL -MOS -TTL Interface The power requirements for the Mathe- matical Function Unit are 5 volts at approx- imately 0.5 Amps, and 7.5 volts at close to 200 mA. The 5 volt supply is used for all TTL gates, and the 7.5 volts is used to operate the MOS calculator chip. The signal levels are buffered and adjusted from the TTL input levels to 7.5 volts through the open collector, high voltage output inverters ICs 7, 8 and 9, using 10 k ohm pull-up resistors in the two resistor packs connected to the 7.5 volt supply. These higher voltage signals are applied to the switch matrix made from CMOS Quad Bilateral Switches (ICs 11-14) operating at that higher voltage. The signals are then directly compatible with the calculator chip used. The signals coming from the calculator chip to the output circuitry are buffered to the 5 volt level through the use of CMOS Hex Non-inverting Buffers, ICs 15, 16, 27 and 28. Construction The Mathematical Function Unit is con- structed on an 1 1 by 4 inch (27.94 by 1 0.1 6 cm) piece of Vectorboard with all wiring done point to point. A parts placement diagram with all of the visible parts, with numbers referencing figure 3, is found in figure 6. The two 24 pin multiplexors and the 28 pin MOS Calculator Chip are placed in sockets. Photo 1 shows the hardware mounted in its case; refer to figure 6 to identify components. The main component board is bolted in a 13 by 5 by 3 inch (33.02 by 12.7 by 7.62 cm) aluminum chassis with a piece of clear plexiglas on the top. Contained also in this chassis are the simple 5 volt and 7.5 volt power supplies for the unit, with the 5 volt regulator, power switch and the IO data line connector mounted on the rear of the box. The "Ready" indicator is mounted on the front panel, indicating the state of the Mathematical Function Unit." In part 2 of his article, which will be published next month, you'll find details of the software needed to drive this calcu- lator interface from an Intel 8080 based computer system . . . . CH 33 c °£« ess from texasl nst MftMriNHpM^M MMHM New. The complete microprocessor learning system. Ready -to -use. Economical. User -paced. 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Dallas, Texas 75222 Postage and taxes will be added to your invoice. Please send me Z more information on theTI Microprocessor Learning Modules. Copies of Soltware Design lor Microprocessors @ $12.95" ea. I enclose □ check [ i money order for $ i€ARnmG ccrvreft I TitfP Firm City RtatP 7ip "Subject to change without notice tAL.AZ, CA. C0.CT. FL, GA, IA, IL, IN. KY, MA, MD. Ml, MN, M0, NC, NJ, NM, NY, OH. PA, TN, TX, UT, VA, WA, Wl. B-7 3E+06ANDB<100THEN710 410 IF W>0 AND R<3E+06 THEN 540 420 IF W#OTHEN 480 430 REM ATTEMPT TO BREAK CONTACT 440 PRINT "KLINGON ATTEMPTS TO BREAK CONTACT" 450 LET C=5 460 GOSUB 1180 470 GOTO 1920 480 PRINT "KLINGON MANEUVERING TO ATTACK" 490 LET C=4 500 GOSUB 1140 510 LET B=0 520 LET H=0 530 GOTO 1920 540 PRINT "KLINGON FIRES PHASOR" 550 LET C=1 560 IF BOO THEN 640 570 IF SI2,I]=0THEN 600 580 GOSUB 920 590 GOTO 1 360 600 LET B=B-90 610 GOSUB 790 620 LET B=B+90 630 GOTO 1360 640 IF S[1,I]=0THEN 670 650 GOSUB 790 660 GOTO 1360 670 LET B=B+90 680 GOSUB 920 690 LET B=B-90 700 GOTO 1360 710 PRINT "KLINGON FIRES PHOTON TORPEDO" 720 LET C=3 730 LET B2=B 740 LET B=40 750 GOSUB 1040 760 LET B=B2 770 GOTO 1360 780 REM FIRE FWD PHASORS 790 LET H=0 800 IF S[1,l]#OTHEN 830 810 PRINT "FWD PHASORS INOP" 820 IF 1 = 1 THEN 260 830 LET R1=1-0.2"(R/1E+06) 840 LET B1=(90-BI/90 850 IF BKOOR R>5E+06THEN 900 860 REM GEN RANDOM NUMBER IN INTERVAL TO 1 870 IF RKRNDI1ITHEN 900 880 LET H = 1 890 LET P=4 900 RETURN 910 REM REAR PHASOR 920 IF S[2,l]#OTHEN 960 930 PRINT "REAR PHASORS INOP" 940 REM 950 IF 1 = 1 THEN 260 960 LET H=0 Gerald H Herd 742 Valley Dr Pensacola FL 32503 While complex Star Trek and Space War games, complete with space warps, fleets of enemy ships, and starbases currently exist, they generally require a sophisticated system to support them. For the microcomputer hobbyist who does not have the resources of Star Fleet at his disposal for the purchase of hardware, the following short version of Star Trek is offered. The program was developed in BASIC on a NOVA 1200 minicomputer and emulates a Star Trek game I originally encountered on the Univac 1108 system at Georgia Tech. The program requires about 2200 16 bit words in its current form, although consider- able savings of memory are possible by simply deleting the remarks. While lacking many of the trappings of larger games, the BASIC Star Trek Trainer offers the follow- ing advantages: 1) A choice of weapons, phasor banks or photon torpedoes, each turn. 2) Maneuvering commands. 3) Deflector shields which weaken as the number of hits on each craft increases. 40 Listing 1 : 4) Warp and impulse drive engines, the status of which are taken into account to compute the incremental changes in range between turns. 5) Evasive maneuvering to escape out of sensor range and end the game in a draw. The player, as captain of the Enterprise, alternates moves with the Klingon battle- cruiser. After a readout of the range and bearing to the enemy vessel, the player is queried for his command. After each move the player receives a status report of the Enterprise or the Klingon. Each ship is armed with a forward twin phasor bank, a single rear phasor, and a forward firing photon torpedo tube. These weapons have relative destructive powers of 4, 2 and 8 respectively. The probability of achieving a hit with the phasors is given by (line 830): P H = 1 - R/(5E06) where R is the range in kilometers between ships. For ranges over 5 million kilometers the phasors are useless. The forward phasors may be used for bearings to 90 degrees, the rear phasors for bearings 90 to 180 degrees. The photon torpedo tube may be used for targets bearing to 90 degrees for which the range is at least 2 million kilo- meters. The probability of a hit is given by (line 1090): P H = (1 -B/90) *(1 -2R/1E08). While the phasors are range dependent, the photon torpedo is almost entirely bearing dependent. Both ships have options for maneuvering to attack and trying to break contact. Maneuvering to attack halves the range and brings the bearing to zero. This command appears most useful when used to close in on ACCEPT YOUR SURRENDER" 970 LET RI'l-O^'RME-Oe 980 REM RANGE BEARING CHECK 990 IF R>5E+06 OR BOO THEN 1030 1000 IF RKRNDI1I THEN 1030 1010 LET H=1 1020 LET P=2 1030 RETURN 1040 LET H=0 1050 IF S[3,l| #0THEN 1080 1060 PRINT "PHOTON TORPEDO INOP" 1070 IF 1 = 1 THEN 260 1080 IF R<2E+06OR B>90THEN 1130 1090 LET R2=(1-B/90IM1-2'R/1E+08) 1100 IF R2 1190 IF R>1E+08THEN 1230 1200 PRINT "CONTACT NOT BROKEN" 1210 LET H=0 1220 RETURN 1230 PRINT "CONTACT LOST" 1 240 STOP 1250 PRINT "SELF DESTRUCT ACTIVATED' 1260 FOR 1 = 10 TO 1 STEP-1 1270 PRINT I 1280 NEXT I 1290 PRINT "BOOM" 1300 STOP 1310 PRINT "MESSAGE FROM KLINGON "• 1320 PRINT "PREPARE TO BE BOARDED." 1330 PRINT '""•MESSAGE FROM STAR FLEET COMMAND" 1340 PRINT "YOU DIRTY COWARD" 1350 STOP 1360 LET J=3-l 1370 IF 03THEN 1920 1380 REM DAMAGE ASSESSMENT 1390 IF H#0 THEN 1440 1400 PRINT "MISS" 1410 GOTO 1920 1420 REM P= DESTRUCTIVE POWER OF WEAPON. D= INCREMENTAL DAMAGE DONE, LIMIT 1430 REM TO A MAX VALUE OF 2. 1440 PRINT "HIT" 1450 LET D=P"(1-S[5,J1) 1460 IF D <= 2 THEN 1480 1470 LET D=2 1480 LET S|7,J]=S[7,JJ+D 1490 LET S[5,J]=S[5,J]-P/100 1500 LET Z=10-INT(S[7,J] ) 1510 IF J=1 THEN 1580 1520 REM DAMAGE DONE TO KLINGON 1530 PRINT "SCANNER REPORT KLINGON" 1540 IF Z>1 THEN 1610 1550 PRINT "KLINGON DESTROYED" 1560 STOP 1570 REM DAMAGE TO ENTERPRISE 1580 PRINT "ENTERPRISE DAMAGE RPT" 1590 IF Z>0THEN 1610 1600 LET Z=1 1610 GOTO Z OF 1620,1640,1850,1730,1730,1780,1780,1780,1830,1830 1620 PRINT "ENTERPRISE DESTROYED" 1630 STOP 1640 PRINT "WEAPON SYST. DESTROYED" 1650 PRINT "WARP DRIVE DESTROYED" 1660 PRINT "MAJOR STRUCTURAL DAMAGE" 1670 PRINT "SHIELDS BUCKLING" 1680 LET S|1,J]=0 1690 LET S[2,J]=0 1700 LET S|3,J]=0 1710 LET S[4,J]=0 1720 GOTO 1920 1730 PRINT "PHASORS DESTROYED" 1740 PRINT "MINOR DAMAGE AMIDSHIPS" 1750 PRINT "SHIELDS WEAKENING" 1760 LET S|1,J]=S[2,J)=0 1770 GOTO 1920 1780 PRINT "FOREWARD PHASORS DESTROYED" 1790 PRINT "MINOR DAMAGE AMIDSHIPS" 1800 PRINT "SHIELDS WEAKENING" 1810 LET S|1,J]=0 1820 GOTO 1920 1830 PRINT "SHIELDS HOLDING NO DAMAGE" 1840 GOTO 1920 1850 PRINT "WEAPONS SYST. DEACTIVATED" 1860 PRINT "DILITHIUM CRYSTALS OVERHEATING" 1870 LET S|1,J]=0 1880 LET S|3,J]=0 1890 LET S|3,J]=0 1900 GOTO 1920 1910 REM NEW RANGE.BEARING 1920 LET R3=0 5"(S[4,1] +S(4,2] +0.05*IS[6,1 ] +S[6,2] )) 1930 LET R = R+R3*(RND(1)-0.5)'1E+06 1940 LET R-ABS(R) 1950 LET B=ABS(B-150+20MRND(1)I) 1960 IF B>180THEN 2000 1970 LET l=J 1980 LET J=3— I 1990 GOTO I OF 260,360 2000 LET B=ABS(360-B) 2010 GOTO 1970 2020 END 41 SUMMARY OF INSTRUCTIONS FOR THE GAME The player will engage a Klingon battle cruiser and will alternate moves with the Klingon. When the prompting message "STARDATE?" appears, enter any random number to initialize the game. This is a seed for the pseudorandom number generator, and using a different number each game prevents repetition of the same battles. Enter the command after the prompting message "COMMAND" appears. Select commands from the following list: Command 1 fires forward phasors, of which there are two. Command 2 fires the rear phasor. Command 3 fires the photon torpedo. The photon torpedo fires forward. The minimum photon torpedo range is 5 million kilometers. Command 4 means "maneuver to attack." The bearing to the target Klingon and the range are reduced. Command 5 means "attempt to break contact" by using the warp drive. If the range goes greater than 100 million kilometers, contact is lost and the game ends. Command 6 is the suicide command, the end game maneuver used to prevent capture by Klingons. Command 7 is surrender to the Klingons. The relative strength of a photon torpedo is 8, the relative strength of the rear Phasors is 2, and the relative strength of the forward phasors is 4. Listing 2: A sample run of this version of Star Trek. ENTER STARDATE 6091. 1 KLINGON APPROACHING R= 3849000 KM. COMMAND 3 MISS KLINGON FIRES PHOTON TORPEDO MISS R= 3661890 KM. COMMAND 4 KLINGON FIRES PHASOR HIT ENTERPRISE DAMAGE RPT SHIELDS HOLDING NO DAMAGE R= 2021835 KM. BEARING^ COMMAND 3 HIT SCANNER REPORT KLINGON SHIELDS HOLDING NO DAMAGE KLINGON FIRES PHASOR HIT ENTERPRISE DAMAGE RPT SHIELDS HOLDING NO DAMAGE R= 1658325 KM. BEARING^ COMMAND 3 MISS KLINGON FIRES PHASOR HIT ENTERPRISE DAMAGE RPT SHIELDS HOLDING NO DAMAGE R= 2092815 KM. BEARING^ COMMAND 3 HIT SCANNER REPORT KLINGON FOREWARD PHASORS DESTROYED MINOR DAMAGE AMIDSHIPS SHIELDS WEAKENING KLINGON FIRES PHASOR MISS R= 2266905 KM. BEARING BEARINC= 69.282 DEG. BEARING= 56.722 DEG. 15.44 DEG. S.4E DEG. 10.48 DEG. 13.12 DEG. a fleeing or crippled foe. Attempting to break contact opens the range. (Along about the time your weapon systems are de- activated, your shields are half gone and the Klingon is closing in, it is time to get it in gear and haul for Alpha Centauri.) The game ends in a draw when the range exceeds 100 million kilometers. Damage assessments are provided any time a vessel is hit by a phasor or photon torpedo. The amount of damage done de- pends on the relative strength of the weapon (8 for a photon torpedo, 4 or 2 for phasors) as well as the effectiveness of the deflector shields. The amount of damage done is computed and added to the cumulative damage, and the deflector shield effective- ness is reduced. Two other commands, surrender and self- destruct, are included for defeatists. The program is written in a version of BASIC which permits GOSUB. . .OF. . . and GOTO. . .OF. . . statements, and may re- quire minor reprogramming for other BASIC languages. The random number function, RND (X) generates a random variable with uniform distribution in a range (0,1). The argument X, when negative, is used as the random number seed; when positive the argument is ignored and an internal seed is used by the generator. By entering a "stardate" at the beginning of each game, a unique pseudo-random number series is gen- erated for that game. The Enterprise and the Klingon use the same routines for command processing. Lines 780 - 1 030 determine if a phasor shot produced a hit or a miss. Lines 1 040 - 1 1 30 process a photon torpedo command. Maneuvering to attack is handled in lines 1140-1170, while attempting to break contact transfers control to lines 1180 — 1240. The damage assessment routine in lines 1380 — 1890 prints out the scanner reports or damage control reports. At the end of each move the subroutine in lines 1910 - 2000 is called to change the range and bearing. The computer selects the Klingon's move in lines 350 - 770. Presently the Klingon is programmed to be somewhat aggressive. For novice Star Trek players the Klingon wins about 75 percent of the first several dozen games." 42 No it's just that first edition of this popular book^sold out in 5 months flat. The second edition of AN INTRODUCTION TO MICROCOMPUTERS has been revised and expanded to two volumes, to keep up with the fast-moving microcomputer industry's pace of change. Have things changed that much in just 5 months? You probably know the answer to that already: a flood of new and second-source CPU chips and a whole host of new LSI support packages. Nowhere else can you get all this vital information. VOLUME I — BASIC CONCEPTS surveys the subject, from elementary concepts to system configuration and design. In VOLUME II — SOME REAL PRODUCTS we take a long, hard look at the products available today and about to be announced tomorrow. If you're actually putting together your first system, you may find some help in the latest addition to the microcomputer library: 8080 PROGRAMMING FOR LOGIC DESIGN. Whether you are planning new products, updating existing ones, or simply need to keep abreast of the latest developments in this revolutionary new technology, AN INTRODUCTION TO MICROCOMPUTERS has become the industry's standard reference on the subject. VOLUME I — BASIC CONCEPTS, takes you by the hand, from elementary logic and simple binary arithmetic through the concepts which are shared by all microcomputers. It tells you how to take an idea that may need a microcomputer and create a product that uses one. This book is complete — every aspect of microcomputers is covered: the logic devices that constitute a microcomputer system; communicating with external logic via interrupts, direct memory access, and serial or parallel I/O; microprogramming and macroprogramming; assemblers and assembler directives; linking and relocation — everything you need to know if you are going to select or use a microcomputer. Volume I is equivalent to Chapters 1 through 6 of AN INTRODUCTION TO MICROCOMPUTERS, first edition, but with extensive new sections on chip slice products and serial I/O. Order publication number 2001. Date available: May 31, 1976. VOLUME II — SOME REAL PRODUCTS, covers real microcomputers, in considerable detail. Every major microcomputer: 4-bit, 8-bit or 16-bit, is described, including some soon to be announced products. Major chip slice products are also covered. More than 20 microcomputers in all. Order publication number 3001. Date available: July 15, 1976. 8080 PROGRAMMING FOR LOGIC DESIGN, is a completely new book on a totally new subject: implementing digital and combinatorial logic using assembly language within an 8080 microcomputer system. What happens to fan-in and fan-out? How do you implement a one-shot? This book simulates well known digital logic devices using assembly language; next it shows you how to simulate an entire schematic, device by device, keeping the assembly language simulation as close to the digital logic as possible. But that is the wrong way to use a microcomputer; the book explains why, then shows you the correct way. This book describes the meeting ground of programmer and logic designer; it is written for both readers. Order publication number 4001 . Date available: June 15, 1976. For ordering and pricing information in Europe contact: Everywhere else SYBEX Publications Department 313 Rue Lecourbe 75015 — Paris, France Telex: 200858 Sybex eft ^^y osb BORNE & ASSOCIATES INC. P.O. Box 2036 • Berkeley.California 94702 • 1415) 548-2805 Copies of each book are available for $7.50 per book plus sales tax for California residents. Discounts are available on orders of 100 books or more. Please be sure to include publication numbers with order. Add 30 cents for surface mail, $2.50 for airmail shipping charge when ordering from outside the U.S.A. Dealer, distribution and translation inquiries welcome. BankAmericard and Master Charge orders accepted • Please include in mail order: card number, expiration date, full name and address MONOLITHIC SYSTEMS CORP. MICRO COMPUTER CONTROL PANEL Photo 1 : One of the keys to the ease of use of this Monolithic Systems Corporation "8080+" microcomputer is its "smart" control panel. Instead of row after row of blinking lights, this panel uses software to drive a hexadecimal display, with a hexadecimal data entry keypad and several control function buttons. The photographs accompanying this article are supplied courtesy of Monolithic Systems Corp, 14 Inverness Dr E, Englewood CO 801 10. The MSC 8080+ Microcomputer as a Personal System Ken Barbier PO Box 1042 Socorro NM 87801 In the beginning there were rows and rows of little lights and little switches. Incredible as it may seem, some micro, mini, and mega computers still come with rows and rows of little lights and little switches. After wearing out countless eyeballs, finger- tips, and four letter words, Mankind finally asked: "Isn't there a better way?" Along came the monitor program in read only memory, allowing instant power up and communication with a console terminal device. This is an excellent solution when higher level languages are available, and not too bad a solution when text editors and assemblers are available. But for entering machine language routines of any length, and for debugging programs which are inti- mately connected with hardware, such as device drivers, the terminal has its limitations. Enter the intelligent control panel, with hexadecimal or octal keyboard and readout. Machine language programs or data blocks can be swiftly entered, and debugging by single stepping through a program while monitoring memory or registers becomes a snap. For the designer of small systems working down at the machine language or hardware level the intelligent control panel can be an attractive alternative . The MSC 8080+, from Monolithic Sys- tems Corp, Englewood CO, is an Intel 8080 based microcomputer with what is un- doubtedly one of the most complete "smart" panels on the market. It includes other unique features which make it a good choice for the person building or experiment- ing with small systems. Some Features of the MSC 8080+ Unpack the MSC 8080+, connect a single +5 VDC @ 2 A power supply, press the RESET switch on the control panel, and you have an operating microcomputer. This ease of setup was one of the reasons I chose this product as my personal computer. The control panel monitor program takes up two of the four 1702A EROM positions on the processor board, and uses a maximum of 64 bytes of the 1 KB static programmable memory, also on the board. The panel monitor program has its own hardware interrupt via the RESET switch, and does not interfere with use of the eight RST instructions which are provided for inter- rupts by the 8080 processor itself. (A separate CPU RESET switch provides access to interrupt 0, once your program is loaded.) Other goodies supplied include a 4.5 inch by 7 inch (1 1 .43 cm X 1 7.78 cm) wire wrap area right on the processor board, with room for 42 sixteen pin sockets (12 of these are used up by the 1 KB RAM). Surrounding this area are nine 26 pin connectors, ac- cepting either wire wrap directly, or ribbon cable connectors, to provide access to periph- erals. All connections to the 8080 pro- cessor are already buffered before reaching the wire wrap section, simplifying the addi- tion of peripheral interfaces. On the MSC 8080+ processor board there is also a DC to DC inverter to provide the +12, -5, and -9 VDC required for the 8080 integrated circuit and the 1702As, so that only the single +5 VDC supply is necessary. Connectors are provided for a number of Photo 2: The various boards of this industrial quality product are designed to be stacked using 1 inch (2.54 cm) spacers. This view illustrates the processor board (front) and dynamic programmable memory board (rear) mounted together with spacers; interconnections throughout an MSC 8080+ system are made using 26 conductor parallel ribbon cable assemblies like the one in the upper right hand corner of this picture. Also note the uncommitted wire wrapping area which can be used for custom logic designs oriented to a specific application system. 45 Photo 3: A side view of the control panel and processor board stacked together for a minimal system. The control panel consists of the metal cosmetic panel (top) and a circuit board to which key switches are attached (middle). The processor board is shown at the bottom of this assembly. For purposes of photography, interboard connector cables have been omitted in this view. Other boards of the family could be added to this stack. (The author's system has an additional 4 K CMOS programmable memory board with battery backup added to the two boards shown here.) memory options, which are detailed later in this article. The control panel is what I found to be the outstanding feature of the MSC 8080+. It has a 16 key hexadecimal keypad, a four digit hex display, 16 function keys, and four status indicator LEDs. A 20 mA current loop TTY interface is provided on the panel, but an additional 1702A (optional) is re- quired to drive it. This 1702A Teletype interface contains a program with timing loops to perform the parallel to serial con- versions, a software UART algorithm. The MSC 8080+ is intended for the industrial market, so the quality of manu- facture and components is first rate and the unit comes assembled. Industrial quality design is one of my reasons for choosing this processor. In spite of this, the goal of the under $1000 computer is met. Control Panel Operation As supplied, the memory address of the panel monitor program is (in hexadecimal) from 0200 through 03FF, and the 1 KB RAM can be found at 0400 through 07FF. Some functions of the monitor use the stack, so the next operation after RESET should be to initialize the stack. This is done by entering 07FF on the hexadecimal key- pad and pressing the LOAD STK PTR function key. As the digits are entered they will appear, shifting into the hex display from the right, and will disappear when loaded into the desired register. The func- tions LOAD STK PTR, LOAD ADDR, and LOAD H+L use 16 bit (4 digit) entries; all other entries are eight bits (2 digits). A user's program can now be keyed in. The start address is set by entering four digits and using the LOAD ADDR key. The address entered will disappear from the display and the eight bit contents of the addressed location will appear in the two low order display digits as LOAD ADDR is pressed, indicating proper operation of the system. Now enter two digits of data or program and press LOAD MEM. At this time an address register in the panel will be incremented and the contents of the next sequential memory location will be dis- played. If a load error occurs (the panel reads back each entry from memory to verify it) an error indication of "FF" ap- pears in the two high order digits of the display. This gives an instant indication if you are trying to write into ROM, or a non- existent address, or hardware that is malfunctioning. Loading each sequential memory location from the panel thus consists of entering and verifying two hex digits of data and pressing LOAD MEM. At any time during loading, the address of the next sequential location can be displayed by pressing READ ADDR. When loading is complete you can verify the program by entering the start address, then using READ NEXT MEM to examine each location in turn. Once your program is entered, initial values of any register can be set using the LOAD REG, LOAD H+L, or LOAD STK PTR keys. Enter your starting address using LOAD ADDR, and you are ready to run. Unless you have infinite confidence in your infallibility, you may want to single step through the program the first time. Just 46 press STEP to execute each instruction in turn. The address of the next instruction will then be displayed. The contents of any register can be examined (READ REG) or changed (LOAD REG) as you step through your program. DECR ADDR will allow you to back up the program counter one byte at a time. When you are confident the program is fully debugged, enter the start address and press RUN to execute it. If things do not go as planned, press STOP to halt the program and display the address of the next instruc- tion. Registers and memory can then be examined. Larger segments of programs, or long loops that would take all day to single step through, can be run by temporarily patching in the HALT instruction where traps are desired. After starting the program with the RUN key, the PROGRAM HALT indicator will light when you reach the HALT instruc- tion. Then simply press STOP to display the next program address and enable all of the other panel functions. The 8080+ control panel uses a combina- tion of hardware and software, but its operation is transparent to the user's pro- gram. If the user's program should end up in the illegal combination of disabled interrupts and program halt, the panel RESET key will restore operation without it being necessary to turn the power off. It is hard to believe without experiencing it how easily a program can be keyed in and debugged using the MSC 8080+ control panel. It makes an expert out of a novice in minutes. Hardware Configuration One unusual aspect of the MSC unit is the absence of edge connectors on the boards. All connections between the control panel, processor board, and optional memory boards are through 26 conductor ribbon cables and matching connectors. The boards can be physically stacked in endless com- binations using #4-40 X 1 inch threaded spacers, or can be mounted in Augat 8170 series frames. As the components of the system are intended to be a part of the user's industrial hardware, no cabinets or power supplies are furnished. The control panel, processor, and dynamic programmable memory boards are all 7 1/2 inches by 13 1/2 inches (19.05 X 34.29 cm). The CMOS programmable mem- ory is slightly smaller on the long dimension but has compatible hole patterns for the spacers or frame mounting. Currently available options include the processor board without programmable memory, and no EROMs installed in the four sockets; a dynamic programmable memory board with room for 32 KB; and a nonvolatile 4 KB CMOS static program- mable memory board with built in NiCad batteries which are kept charged during normal operation. In the works, according to MSC, is a compatible EROM board with pre-loaded software including a text editor and assembler. A User Comments on the MSC 8080+ For years I had been waiting for the price of some old worn out mini to come within reach of a meager hobbyist budget, but before that could occur the age of micropro- cessors was upon us. I didn't feel that I had the time to spare to put together a system from a handful of parts, so I watched the "processor on a board" market develop with much interest. Prices were still high, but falling rapidly, when the Altair explosion occurred. I was instantly tempted by the first Altair ad, but since I had no TTY or other terminal to go with it the investment required for any sort of useful configuration was still several kilobucks. And there were all those rows of lights and switches! I had too many of those to contend with while earning a paycheck; I resolved that any system I had at home would have minimal blinking lights! So I watched, and waited, and collected specifications sheets, and com- pared instruction sets. I think too little has been said about the relative merits of micros and minis when comparing instruction sets. It is not enough to have bunches of instructions and memory addressing methods. It is not enough to have all kinds of tricks to conserve memory. To be truly useful a machine must have a set of instructions that are easy to learn, easy to remember, easy to use, and suited to the task at hand. A calculator will beat any micro at number crunching, but is lost as a controller. (How long must we wait for the micro-control I ing-a-calculator chip?) Having worked with machines from big IBM size to hand held calculators, I had a pretty good idea of what I wanted for a home controller, game player, and ac- counting system. The Intel 8008 didn't quite make it, but when I saw the instruction set of the Intel 8080, I flipped! All that simplified CALLing and RETurning, PUSH- ing and POPping, and decimal adjust too! So now I knew my system would use the 8080. I started trying to design a "smart" control/display panel. From the day I saw the first Altair ad til I found what I wanted For more information on the MSC 8080+ contact: Monolithic Systems Corp, 14 Inverness Or E, Englewood CO 80110. Their phone number is (303) 770-7400. 47 Altair Owners... Have you heard our new hit single? THE FIRST DOUBLE DENSITY FLOPPY DISK SYSTEM FOR MICROCOMPUTER SYSTEMS! BASIC FOR THE 6800 We now have full blown BASIC ready for delivery. It has full floating point arithmetic, strings, subroutines, arrays, and USER DEFINED VERBS! Price $65.00 per copy (includes documentation and paper tape) PROM /RAM BOARD FOR ALTAIR 8800 AND IMSAI SYSTEMS Contains 3,840 bytes of ROM and 256 bytes of scratchpad RAM on one board. Extensive monitor software provides memory examine/change using octal or hex, trap functions, bootstrap loaders for MITS BASIC and monitor software, paper tape and cassette dump and load functions using hex or BNPF formats. Also contains a DISASSEMBLER and a RELOCATOR. Price $245.00 ADDITIONAL PRODUCTS FOR THE SWTP 6800 Wire Wrap Board Accepts 40 pin, 24 pin, 16 pin and 14 pin sockets as well as discrete components. Contains 7 805 on-board regulator for +5V power bus. Plugs into the SWTP 6800 mother board. Price $25.00 PROM /RAM Board Contains 3,840 bytes of 1702A ROM and 256 bytes of RAM on one board. May be used to contain MSI-FDOS software and scratchpad area. Price $95.00 MSI SOFTWARE PRODUCTS: 12K 6800 Basic $65.00 Relocating loader program. . . $15.00 Disassembler program $25.00 IK Mini Assembler program. . . $25.00 We've made several othet hits at MSI, Including our floppy disK system for programmable calcu- lators, CRT terminals, PROM programmers, high speed printers, and instrumentation interfaces. For more comprehensive product information, write MSI at the address below. Watch our monthly ad, and we'll introduce you to our new products for the computer nobbiest. TtticUueat Scientific *)K&foumeHt& — — fl MSI is proud to introduce the FD-8 floppy disk memory system for use with the Altair 8800, Motorola 6800, and other micro computer systems. The FD-8 requires only one PIA chip for Interfacing to any microcomputer system. One 8 bit bidirectional data port and one 8 bit control port and that's it! Complete FDOS software for 8080 and 6800 systems is provided and can operate from either RAM or ROM as desired. Format Specifications: • 77 Tracks/ Diskette • 16 (32) Sectors /Track* • 256 Bytes/ Sector • 315,392(630,784*) Bytes/ Diskette *Model FD-8-II with Double Density Introductory Prices: SINGLE DRIVE MODELS: SINGLE DENSITY, KIT $ 950.00 DOUBLE DENSITY, KIT $1250.00 DUAL DRIVE MODELS: SINGLE DENSITY, KIT $1750.00 DOUBLE DENSITY, KIT $2050.00 220 WEST CEDAR, OLATHE. KANSAS 66061 • PHONE 913 764-3273 • TWX 910 749 6403 (MSI OLAT) 48 from MSC, I spent long hours of free time trying to design the perfect control panel. All my designs were bogged down in exces- sive amounts of hardware, so too expensive. I gave up on the panel idea, and started building a CRT terminal, although I had nothing to connect it to yet. Suddenly there appeared before me (in one of the electronics trade magazines) a description of Monolithic Systems Corpora- tion's 8080 based processor board with single +5 VDC power supply and room left over for all my interface circuitry. Ideal! By the time I called them, they were announc- ing the MSC 8080+ system, with that neat processor board and a smart panel. I dug out my old panel design sketches and sure enough they had stolen all my ideas by long distance telepathy! And added lots of func- tions I would never have thought of. I wasted no time in ordering an MSC 8080+. When it arrived it took me only one weekend to connect up my CRT terminal hardware, key in and debug the software I had previously written, and have a smart CRT terminal in operation. This is a tribute both to Monolithic's interfacing documenta- tion, and the speed of operation possible with this control panel. A 4 KB CMOS board arrived later, and after hooking it up I was able to turn things off without losing all my software. Of course it is still possible to blow my programs by writing stupid mistakes into them, but the ability to single step through program seg- ments has all but eliminated that problem. (Most debug programs used with a console terminal have a limited number of settable traps, or breakpoints, and it is too easy to sneak past them all and get totally lost. Not so with single stepping.) This combination has proved to be an ideal solution to the problem of putting together an inexpensive home computer, especially as I had no method of program storage with the power off. While the cost is not as low as some systems advertised in BYTE, there are many tangible benefits that come with the small extra expenditure. The panel has all the functions you'll ever need for machine language programming. The system was factory assembled and tested, built of the best quality components and fully guaranteed. All of the "works" are hidden behind a professional appearing front panel, so it doesn't look like a collection of surplus parts. And, delivery was on a realistic schedule. The least I can say is that I am com- pletely satisfied with this product, and don't hesitate to recommend it to other computer- heads." All- new Phi-Deck: precision remote controlled cassette transports starting at under $100! C^aJ! Featuring: • Re-engineered precision parts • New cast frames • 4 motor reliability Ir^wjP^ gfPfjpvCa • Remotely controlled $r • Precise, fast head engage/disengage • Quick braking • Various speed ranges Electronic packages for control or read/write For application In: 6. Data duplicating 1. Micro processing 7. Security/automatic warning 2. Data systems recording/logging/storage 8. Test applications 3. Programming 9. Audio visual/education 4. Instrumentation 10. Hi-Fi 5. Industrial Control 11. Others I urt i i i a I InpiGl A Division of The Economy Co. 1901 North Walnut P.O. Box 25308 _l Oklahoma City, Oklahoma 73125 (405) 521-9000 □ I am interested in application no □ Have Representative call □ Send application notes Name Company Name Address _ City_ Title State Phone Number Zip BROWN-OUT PROOF your ALTAIR 8800 With the unique Parasitic Engineering constant voltage power supply kit. A custom engineered power supply for your Altair. It has performance features that no simple replacement transformer can offer: * BROWN-OUT PROOF: Full output with line voltage as low as 90 volts. •OVER-VOLTAGE PROTECTION: Less than 2% increase for 130 volt input. •HIGH OUTPUT: 12 amps @ 8 volts; 0.5 amps @ ±16 volts. Enough power for an 8800 full of boards. •STABLE: Output varies less than 10% for any load. Regulators don't overheat, even with just a few boards installed. •CURRENT LIMITED: Overloads can't damage it. •EASY TO INSTALL: All necessary parts included. Only ip I O postpaid in the USA . calif, residents add $4.50 sales tax. Don't let power supply problems sabotage your Altair 8800. PARASITIC ENGINEERING PO BOX 6314 ALBANY CA 94706 49 How to Do a Number of Conversions James Brown 2518 Finley St #636 Irving TX 75062 Table 1: Hexadecimal Codes of Selected ASCII Characters (high order bit assumed zero). Hexadecimal ASCII Hexadecimal ASCII Hexadecimal ASCII Code Character NUL Code Character Code Character 00 30 40 @ 31 1 41 A 0A line feed 32 2 42 B 33 3 43 C 0D car. ret. 34 4 44 D 35 5 45 E 20 space 36 6 46 F 37 7 47 G 2B + 38 8 2C , 39 9 2D — 3A 2E 2F / Perhaps one of the more difficult tasks on any small computer is the conversion from numeric characters to a form usable by the machine and back again. That is, given some type of input output device (Teletype or TV typewriter) connected to your computer, it would be desirable to have the capability of entering a string of numeric characters (con- secutive digits) through the keyboard. The computer would then perform some opera- tion on that number. Finally, the result of that compulation is displayed back on the 10 device. Since the computer's natural language is N bit binary (i.e., ones and zeros), how can such a string be converted? An example of the problem is: How do I convert the three character decimal string '196' into the binary integer equivalent 1100 0100 (or octal 204, or hexadecimal C4)? Converting a decimal (base 10) number into binary can be a long and involved operation. Let us work our way into decimal conversion by considering what would be Listing la: The BIN Rou- tine Specified for an 8080. This listing, as all the list- ings of this article, shows the symbolic code and ab- solute machine code for an 8080 version of the rou- tine. The notes refer to absolute addresses which must be adjusted when re- locating the code to some address in memory address space. BIN reads the 7' and '0' characters of an ASCII encoded binary string, leaving up to 8 bits of input in B. Note 1 Rel. Addr. Code 06 00 Label Op. MVI Operand B,0 Commentary 0000 BIN: ANSWER := 0; 0002 CD xx xx BINLOOP: CALL GET A := INPUT | character |; 0005 FE 30 CPI '0' is A LT '0'? 0007 D8 RC if so then return; 0008 FE 32 CPI •2' is A LT '2'? 000A DO RNC if not then return; 000 B 1F RAR CARRY := A ; OOOC 78 MOV A, B A := ANSWER; 000 D 17 RAL rotate carry into A; 000E D8 RC overflow: if CARRY = 1 then return 000 F 47 MOV B, A ANSWER := A; 0010 C3 xx xx JMP BINLOOP reiterate for next bit; Note 2 Note 1 : address of GET should replace "xx xx". Note 2: "xx xx" should be the address of BINLOOP. 50 necessary to do the following conversions in order of increasing complexity: 1 . Binary character strings (ASCI I or 1 ) to or from unsigned 8 bit integers. 2. Octal character strings (ASCII to 7) to or from unsigned 8 bit integers. 3. Hexadecimal character strings (ASCII to 9, A to F) to or from unsigned 16 bit integers. 4. Signed decimal character strings (ASCII to 9, +, -) to or from signed 16 bit integers. Before we start, let us examine what the computer sees when a character is read from the keyboard, assuming that the keyboard speaks ASCII. Examining table 1, notice that each character is assigned a unique binary value. Not only are the numeric characters thru 9 grouped together; but, if the left hand four bits were dropped, there would be a direct correspondence to the binary equival- ents of thru 9. As shown below, this is a fairly simple task: Algorithm: 'ASCII char' (AND) (0000 1 11 1) = result Examples '0': (0011 0000) (AND) (0000 1111) = 0000 0000 '1 ': (001 1 0001 ) (AND) (0000 1111) = 0000 0001 '9': (001 1 1 001 ) (AND) (0000 1111) = 0000 1 001 In each case, the result is a binary number in the low order of the byte after the AND operation has masked the high order bits. Binary Conversions Converting the ASCII character codes for 1 and into a true binary value is perhaps the simplest to actually implement, and is a good starting point in understanding how number conversions work. All of the other routines follow the basic plan presented here. In the preceding, zapping the left four bits to get a binary value has one fatal flaw; it only works for one character. In develop- ing something to handle a two character string such as '10', it might as well accept ASCII strings with any length, as long as the result can be contained in eight bits (an arbitrary choice). The simplest way of doing this is to perform the conversion one character at a time as they are entered and develop the result as each character of the string ('1 ' or '0') is processed. Clearly the first step is to read the character and convert it into the binary value 1 or 0, using the masking technique shown earlier. Since most computers have some type of shift instruction (see note 1), this is an effective way of moving the new bit into the result which is being calculated. Specifically, we must shift the result left one bit and then OR the new converted value to it. This is mathematically equivalent to multiplying by 2 and adding. For example, the four char- acter binary string '1011' is entered and converted to the binary number 1011. This is equivalent to the expression: 1 * 2 3 + * 2 2 + 1 * 2 1 +1 * 2° = 1 1 (base 10) and could be accomplished by the following sequence: 1 . answer: = 2. INPUT character 3. character: = character (AND) 01 (hex) 4. answer: = answer (SHIFT LEFT) 1 5. answer: = answer (OR) character 6. GO TO 2. If those four characters were all I wanted to enter, I now need to tell the computer to stop looping, since there is a possibility of entering as many as eight characters. The Note 1 Note 2 Rel. Addr. Code Label Op. Operand Commentary 0000 0E 08 BOT: MVI C,8 CNT :=8; 0002 78 BOTLOOP: MOV A, B A := ANSWER; 0003 07 RLC CARRY := Ay; rotate A Left 0004 47 MOV B, A ANSWER := A; 0005 3E 18 MVI A, 18H A := b'00011000'; 0007 17 RAL rotate A left; A n = CARRY; 0008 CD xx xx CALL PUT OUTPUT := A; 0OOB OD DCR C CNT := CNT - 1; 000C C2 xx xx JNZ BOTLOOP if CNT NE then repeat; 000F C9 RET else return; Note 1 : address of PUT shou Id replace "xx xx". Note 2: "xx xx" should be the address of BOTLOOP. Listing lb: The BOT Rou- tine Specified for an 8080. This routine writes out a string of 8 binary encoded ASCII digits, taken from the B register. 51 Figure la: The BIN Rou- tine Flowchart. This rou- tine treats successive ASCII '0' and T charac- ters of input as the digits of a binary string. The digits are shifted into ANSWER until an illegal character or overflow re- turns control. In the 8080 code of listing la, AN- SWER is register B. bin: binloop: Figure lb: The BOT Rou- tine Flowchart. BOT is a binary output routine which writes an 8 digit ASCII binary string con- verted from ANSWER. The digits are printed high order first in a loop which shifts out the bits one by one. In the 8080 code of listing lb, ANS WER is sup- plied by register B. bot: .CHARACTER j TERMINATES .CHARACTERS TERMINATES STRING ROTATE AN- SWER RIGHT BY ONE POSITION ROTATE CARRY LEFT INTO A iOUTPUT>y CNT> CNT-I; I OLD LOW ORDER l I IS NOW IN I I CARRY FLAG I I 1 ! ASCII '0' OH '1' | (OOIIOOOO OR 'OOIIOOOI ) LT C RETURN J Note 1 Listing 2a: The 01 N Rou- tine Specified for an 8080. This routine accepts an in- put string of ASCII octal characters and collects the results in ANSWER (CPU register B). Conversion ends with invalid char- acters or an overflow. Rfil. Addr. Code Label Op. Operand Commentary 0000 06 00 OIN: MVI B,0 ANSWER :=0; 0002 CD xx xx OINLOOP: CALL GET A := INPUT [character]; 0005 FE 30 CPI '0' is A LT '0'? 0007 D8 RC if so then return; 0008 FE 38 CPI '8' is A LT '87 OOOA DO RNC if not then return; 000 B E6 07 ANI 7 A := A&b'000001ir [mask low order] 000 D 4F MOV C, A C := A; 000 E 78 MOV A, B A := ANSWER; 000 F 07 RLC rotate A left three 0010 D8 RC bit positions 0011 07 RLC and check for 0012 D8 RC overflow into 0013 07 RLC CARRY after 0014 D8 RC each operation; 0015 B1 ORA C A ;= A OR ANSWER; 0016 47 MOV B, A ANSWER := A; 0017 C3 xx xx JMP OINLOOP reiterate for next digit; Note 2 Note 1: address of GET should replace "xx xx". Note 2: "xx xx" should be the address of OINLOOP. 52 simplest way of doing this is to have the routine recognize some sort of delimiter (ie: some character other than '0' or '1'). Looking, once again, at table 1, the char- acters space, period, comma, carriage return, line feed, are all less than the character '0', when considered as binary values. This con- dition is rather handy, since the same set of machine instructions could recognize a variety of delimiters without rewriting if I want to change what delimeter means. Look- ing further, if the special characters between the 1 and A are excluded as delimiters, the following pair of tests checks for both delimiters and invalid characters. • If the character is less than a '0' then finished. • If the character is greater than a '1' then illegal character. There is one further consideration that this routine should take into account. The routine should check for a string of char- acters whose value would exceed the maxi- mum value which could be contained in 8 bits (anything over 255 decimal). Notice that the routine really cannot count the number of characters entered since nine zeros and a one are still the value one, even though 10 characters were processed. Most computers have something called a carry bit or overflow flag. During a shift left this carry bit usually receives the most significant bit from the register being shifted. Thus, as soon as the carry bit becomes a one, then the result has overflowed 8 bits; and the number being entered is too big. Figure 1a shows the detailed flow of the binary input procedure; listing 1a shows the 8080 assembly code of this procedure. Output is simply the reverse process but has error checking omitted. Since the input was left to right, the output should be the same. (It is extremely frustrating to enter the character string '1100' and have the string '0011 'printed out.) Fortunately most computers have a rotate left instruction (note 1). If I choose to always print 8 characters per 8 bit value (after all, the computer is working, not me), the output routine should perform the following steps: 1. value = value (ROTATE LEFT) 1 2. character = value (AND) 1 3. character = character (OR) '0' (ASCII character code for '0' is hex 30) 4. OUTPUT character 5. GOT0 1. Figure lb contains the flow diagram for this procedure, and listing lb shows typical code for an 8080 computer. Octal Conversions For octal input from strings with ASCII characters '0' thru '7', the binary input routine can be used with some modifica- tions. As shown in figure 2a, the illegal character check now looks for something greater than a '7', the shift left is now three bits instead of one, and the mask used on the character during the logical AND opera- tion is now an octal 7. The octal output routine was a bit of a problem because the value is an 8 bit quantity. Hence, the routine must process the first two bits, then the next three, then the next three, left to right, as indicated on the flow chart. In my implementation, the 8080 had a rotate which would flow through the carry flag. Thus the bits as they are Note 1 Note 2 Note 3 Rel. Addr. Code Label Op. Operand Commentary 0000 0E03 OOT: MVI C,3 CNT := 3; 0002 AF XRA A Clear A; Clear CARRY; 0003 78 MOV A, B A := ANSWER; 0004 C3 xx xx JMP OOTSKIP skip around POP first time 0007 F1 OOTLOOP: POP PSW restore (A, flags); 0008 17 OOTSKIP: RAL rotate A left 0009 17 RAL by three 000A 17 RAL bit positions; 000B F5 PUSH PSW save (A, flags); oooc E6 07 ANI 7 A := A &b'0000011T [mask low order]; 000 E F6 30 ORI '0' A := A OR b'001 10000' [add hexadecimal 30]; 0010 CD xx xx CALL PUT OUTPUT := A; 0013 0D DCR C CNT := CNT - 1 ; 0014 C2 xx xx JNZ OOTLOOP if CNT NE then repeat; 0017 F1 POP PSW flush garbage from stack; 0018 C9 RET return to caller; Note 1: "xx xx" should be the address of OOTSKIP. Note 2: address of PUT should replace "xx xx". Note 3: "xx xx" should be the address of OOTLOOP. Listing 2b: The OOT Routine Specified for an 8080. This routine con- verts the contents of AN- SWER (CPU register B) into a 3 digit ASCII string of octal characters, trans- ferring the result to the output device during the conversion. 53 oin: Figure 2a: The OIN Rou- tine Flowchart. OIN is the octal version of an input routine; its logic is an ex- tension of the simpler BIN routine. OIN treats suc- cessive characters from ASCII '0' to 7' as octal digits which are shifted into ANSWER. The rou- tine accepts input until an illegal octal character or overflow occurs. In the 8080 code of listing 2a, ANSWER is register B. ( BEGIN J OOT: ( BEGIN J answer:-o cnt> 3> carry:- O; A: -ANSWER; ootloop: » l ^ I OXX IN LOW I ORDER I (FIRSTTIME) ROTATE A LEFT 3 POSITIONS SHIFT ANSWER LEFT 3 BITS answer:* answer or C; ILLEGAL CHARACTER I TERMINATES I MASK THE 3 J I LOW ORDER ! BITS I OVERFLOW I I TERMINATES I 1 STRING (return J handled are shown below, after the value is loaded into the A register and carry reset to zero. Carry A Register bb bbb bbb RAL : b bb bbb bbO RAL : b bb bbb bOb RAL : b bb bbb Obb At this point carry and the A register are saved and a character put out. Processing then continues at the first rotate, after the saved information is restored. The A register plus carry, in effect, operates as if the machine has a 9 bit register. Hexadecimal Input and output of hexadecimals em- ploys logic similar to the preceding routines, with the following differences: 1. ASCII '0' through '9' and 'A' through 'P are legal numbers. I XXX IN LOW J0RDER(2nd, 3rd TIME) A> A87; A> A OR 'O' OUTPUT:' V A ( RETURN J Figure 2b: The OOT Rou- tine Flowchart. OOT is the octal version of an output routine for character string conversion. Its logic is complicated by the fact that 8 bits is not an even multiple of 3 bits. Thus there is a special case which treats the carry flag as a ninth bit for the first (high order) output digit. Then the basic logic con- sists of shifting 3 places, extracting 3 bits and crea- ting an ASCII character from '0' to 7'. This rou- tine in its 8080 implemen- tation uses the stack as a temporary data area, as shown in listing 2b. 54 Note 1 Note 2 Rel. Addr. Code Label Op. LXI Operand H,0 Commentary 0000 21 00 00 XIN: ANSWER := 0; 0003 CD xx xx XINLOOP: CALL GET A : = INPUT |character|; 0006 FE 30 CPI '0' is A LT '0'? 0008 D8 RC if so then return; 0009 FE 3A CPI ';' is A LT ':' [numerics]? 000 B DA xx xx JC XINSHIFT if so then go shift it in; 000 E FE41 CPI 'A' is A LT 'A'? 0010 D8 RC if so then return; 0011 FE 47 CPI 'G' is A LT 'G' [alphabetic A to F|? 0013 DO RNC if not then return; 0014 C6 09 ADI 9 A := A + 9 [convert to hexadecimal ]; 0016 E6 0F XINSHIFT: ANI 15 A := A & b'00001 111' [mask low order] ; 0018 29 DAD H shift ANSWER register pair 0019 D8 RC left four bit 001 A 29 DAD H positions using 001 B D8 RC double byte addition 001 C 29 DAD H and test each 001 D D8 RC operation for 001 E 29 DAD H an overflow error 001 F D8 RC return condition; 0020 B5 ORA L A := A OR L [add new code to lower order| 0021 6F MOV L, A restore low order to ANSWER; 0022 C3 xx xx JMP XINLOOP reiterate for next nybble; Note 3 Note 1: address of GET should replace "xx xx". Note 2: "xx xx" should be the address of XINSHIFT. Note 3: "xx xx" should be the address of XINLOOP. Listing 3a: The XIN Rou- tine Specified tor an 8080. This routine accepts an in- put string of ASCII hexa- decimal characters and col- lects the results as a 16 bit number in ANSWER (CPU register pair H and L). Rel. Addr. Code Label Op. MVI Operand 0000 0E04 XOT: C,4 0002 AF XOTLOOP: XRA A 0003 29 DAD H 0004 17 RAL 0005 29 DAD H 0006 17 RAL 0007 29 DAD H 0008 17 RAL 0009 29 DAD H O0OA 17 RAL 000B FE 0A CPI 10 000 D DA xx xx JC XOTASCII 0010 C6 07 ADI 7 0012 C6 30 XOTASCII ADI '0' 0014 CD xx xx CALL PUT 0017 0D DCR C 0018 C2 xx xx JNZ XOTLOOP 001 B C9 RET Note 1 Note 2 Note 3 Note 1 : "xx xx" should be the address of XOTASCII. Note 2: address of PUT should replace "xx xx". Note 3: "xx xx" should be the address of XOTLOOP. Commentary CNT := 4; CARRY := 0; A := [clear A, CARRY]; Shift four bits of ANSWER into A using two byte addition with CARRY receiving each bit from the high order due to overflow; is A LT 10 [test for numeric digit]? if so then go form ASCII character code; if not then A := A + 7 [adjust to alpha]; A := A + '0' |convert to ASCII code]; OUTPUT := A; CNT := CNT- 1; if CNT NE then repeat; else return to caller; Listing 3b: The XOT Routine Specified for an 8080. This routine con- verts the contents of AN- SWER (CPU register pair H and L) into a 4 digit ASCII string of hexadeci- mal characters, transfer- ring the results to the out- put device with PUT. 2. The shift left is now four bits. 3. On input if the character is ASCII 'A' through 'F', then a binary 9 is added to generate a correct value in the low order 4 bits which are then masked as usual: ASCII A = hexadecimal 41 + 09 = 4A (and) 0F = 0A 4. On output if a 4 bit binary value is greater than a 9, then a 7 is added to the value. The conversion is then completed by adding hexadecimal 30, the ASCII code for (zero). For example: 00 + 30 = 30 or ASCII '0' 09 + 30 = 39 or ASCII '9' 0A + 07 = 11 + 30 = 41 or ASCII 'A' OF + 07 = 16 + 30 = 46 or ASCII 'F' The software of 16 bit unsigned hexa- decimal input and output conversion is 55 xin; f BEGIN J xot: Figure 3a: The XIN Rou- tine Flowchart. XIN is the hexadecimal version of the input algorithm, with the extension of accepting 16 bit values. The XIN routine tests for the valid- ity of the hexadecimal dig- its, then converts the low order bits to a binary ver- sion of the digit. This value is then shifted into the ANSWER being pre- pared. In the 8080 version of this routine (listing 3a), ANSWER becomes the HL index register pair, and the 8080's double precision addition operation is uti- lized. Conversion termi- nates with an invalid character or when over- flow occurs. I ILLEGAL I CHARACTER TERMINATES Illegal hexadeci- mal charac-| TER TERMIN- i ATES INPUT rADJUST LOW I ORDER OF | VALID HEX- | ADECIMAL | ALPHABETIC ^CHARACTER BITS D SHIFT4HIGH ORDER BITS OF ANSWER INTO A XOTASCII Ai- A + 'O' ; OUTPUT!' (return ") Figure 3b: The XOT Routine Flowchart. XOT converts a 16 bit quantity in ANSWER into a series of ASCII hexadecimal char- acters, starting with the high order digit. The logic shifts out 4 bits at a time into the accumulator, adjusts the value if alphabetic codes are present then prints the ASCII version obtained by adding V to the value. Four digits are created and printed prior to return. shown in listings 3a and 3b as implemented for an 8080 computer. The flow charts of figures 3a and 3b outline the logic for adaptation to other computers. When this was implemented, an arbitrary choice was made to use 16 bit values instead of 8 bit. This can lead to some inconvenience on an 8 bit microprocessor without 16 bit opera- tions. However, certain instructions were available on the 8080 to perform double register operations (two 8 bit registers treated as a single unit). The 8080 DAD instruction performs 16 bit addition on the (H,L) register pair using another specified register pair. When the 8080 instruction DAD H is encountered, the value in (H,L) is doubled, thus in effect shifting that pair of registers left one bit.. For input shifting, it 56 Rel. Addr. Code Label Op. LXI Operand 0000 21 00 00 DIN: H,0 0003 01 00 00 LXI B,0 Note i 0006 CD xx xx CALL GET 0009 FE 2B CPI '+' Note 2 000B CA xx xx JZ DINSIGN 000E FE 2D CPI '— ' Note 3 0010 C2 xx xx JNZ DINNUMB 0013 0D DCR C 0014 41 DINSIGN: MOV B.C Note 1 0015 CD xx xx CALL GET 0018 FE 30 DINNUMB: CPI '0' 001 A D8 RC 001 B FE 3A CPI ';' 001 D DO RNC 001 E E6 0F ANI 15 0020 4F MOV C, A 0021 78 MOV A, B 0022 06 09 MVI B,9 0024 54 MOV D, H 0025 5D MOV E, L 0026 17 RAL Note 4 0027 D2 xx xx JNC DINMPYP 002A AF XRA A 002B 91 SUB C 002C 4F MOV C, A 002D 7C MOV A, H 002 E 17 RAL Note 5 002 F DA xx xx JC DINMPYN 0032 06 MVI B,0 Note 6 0033 C3 xx xx JMP DINEGATE 0036 19 DINMPYN: DAD D 0037 DO RNC 0038 05 DCR B Note 5 0039 C2 xx xx JNZ DINMPYN 003C 05 DINEGATE DCR B 003 D 09 DAD B Note 2 003E C3 xx xx JMP DINSIGN 0041 19 DINMPYP DAD D 0042 D8 RC 0043 05 DCR B Note 4 0044 C2 xx xx JNZ DINMPYP 0047 09 DAD B Note 2 0046 C3 xx xx JMP DINSIGN Commentary ANSWER := 0; SIGN :=0;NSIGN := 0; A := INPUT [character] ; is A = '+'? if so then go save sign is A = '-'? if not then go to numeric tests; SIGN :» -1; NSIGN : = SIGN; A := INPUT [character] ; is A LT'0'? if so then return [not numeric] ; is A LTV? if not then return [not numeric] ; A := A & b'00001 111' [mask low order] VALUE := A [save input, low order] ; A := NSIGN; CNT :=9; MULTPLR : = ANSWER [high order] ; MULTPLR := ANSWER [low order] ; is SIGN positive? [uses copy in A] ; if not then go to positive multiply; A :=0; CARRY :=0; A := A - VALUE [negate VALUE] ; C := A [save negated value] ; A := ANSWER [high order] ; is ANSWER negative? if so then proceed [not first time] ; CNT := [so sign extension at DINEGATE works] ; first time add VALUE to ANSWER [initialized to zero ANSWER := ANSWER + MULTPLR [both are negative if no overflow then return; CNT := CNT - 1; if CNT NE then reiterate; CNT := CNT - 1 [now CNT := -1 ] ; ANSWER := ANSWER + (- VALUE) [1 6 bit ops] ; reiterate with next numeric character; ANSWER := ANSWER + MULTPLR; if CARRY := 1 then return [overflow] ; CNT := CNT -1 ; if CNT NE then reiterate; ANSWER := ANSWER + VALUE; reiterate with next numeric character; Listing 4a: The DIN Rou- tine Specified for an 8080. This routine converts an ASCII decimal string of the form 'SXXXXX' into a signed 1 6 bit quantity in ANSWER (the CPU's H and L register pair). The 'S' can be either '+', '—'or a null string ("); the 'X' can be a decimal digit '0' to '9' or a null siring. (Thus a successful conver- sion can involve from I to 6 characters.) Conversion is terminated by an over- flow or an invalid char- acter. Note 1 : address of GET should replace "xx xx". Note 2: "xx xx" should be the address of DINSIGN. Note 3: "xx xx" should be the address of DINNUMB. Note 4: "xx xx" should be the address of DINMPYP. Note 5: "xx xx" should be the address of DINMPYN. Note 6: "xx xx" should be the address of DINEGATE. was a simple matter o.f performing four of these and then using an OR to the low order 8 bits from the value generated as a result of step 3 above. Output necessitated four groups of DAD H and RAL operations to shift a bit into carry, then rotate it into the A register before step 4 was performed (see listing 3b). Decimal Integer Conversions Purely out of habit, I choose to use leading minus sign to indicate negative, ASCII '— ', with '+' or nothing to indicate positive integers. Again I felt that a 16 bit routine would be more useful than an 8 bit one, allowing two's complement binary values for 32767 to -32768 instead of 127 to -128 (see note 2). Input was fairly straightforward, as shown by listing 4a and figure 4a. If the first character read is a '— ', set the minus flag. Then for all numbers read, if the minus flag is set, the value is negated. The developing answer is multiplied by 10 and the new value read added to it. The implementation shown performs multiplication by repeated addi- tion for simplicity, although a hardware multiply instruction would certainly im- prove performance if it were available. Decimal output, unfortunately, could not Text continued on page 60 57 Note 1 lote 2 Note 3 Note 4 Note 5 Note 6 Note 7 Note 3 Note 2 VALUE or'o; NONZERO^O Rel. Addr. 0000 0003 0004 0006 0007 0008 000B 000C 000 D OOOE 000F 0010 0011 0012 0014 0017 0018 0019 001 A 001 B 001 C 001 D 001 F 0020 0021 0022 0023 0024 0025 0028 0029 002C 002 D 002 E 002F 0032 0033 0036 0038 003A 003D 003E 0040 0043 0044 0045 0047 0049 004B 004 D temp:-mem (POINTER); POINTER ;- POINTER + I; I 16 BIT I 'OPERATIONS! I I ' I NO value: A 8 15: answer:- answer*io + VALUE; YES I MASK LOW ORDER I WITH BINARY 'OOOOIIII [decimal LEFT SHIFT THEN ADD; USE DIF- FERENT LOGIC FOR + AND- ALGEBRAIC I ISIGNS ; value:- VALUE + I | WENT TOO I | FAR, SO RE- I I STORE VALUE \ c RETUR D Figure 4a: The DIN Routine Flowchart. With decimal arithmetic values, the shifting involved is no longer an integer multiple of one bit. The DIN routine uses the decimal version of binary shifting: multiplying the value by the base of the number system, then adding in the new low order value. DIN also includes sign decoding logic for the ASCII '+' and '-' characters. In the 8080 version of DIN, the result is a signed two's complement number in ANSWER, a 16 bit quantity in the HL index register pair. Figure 4b: The DOT Routine Flowchart. The decimal equivalent of the shifting used in the base 2 n output routines is division by the base of 10. This routine also includes leading zero suppression and logic to print a sign digit. Division is performed by repeated subtraction using values stored in TEN- STAB L. In the 8080 version of listing 4b, the ANSWER to be output is a 16 bit signed two's complement number in the HL Index register pair. 59 Text continued from page 57 be made quite so simple, primarily because there really exists no decimal (base 10) left shift. This left two alternatives, either re- petitively divide by 10 stacking the re- mainders, or perform a succession of pseudo divisions by subtracting appropriate con- stants. The latter technique was chosen due to the complexity of multi register division. The code of such a routine for an 8080 is shown in listing 4b, and the corresponding flow chart is figure 4b. The output routine checks the initial value to determine if it is negative, and if so, output the ASCII character '— '. If the value is negative, it is negated (making it positive) so that positive and negative num- bers can be handled the same way. A table containing powers of 10 (10,000; 1,000; 100; 10; 1) was then utilized to perform pseudo divisions by successive subtraction. This is outlined in the flow diagram in figure 4b. For the 8080 implementation, there is no 16 bit subtraction, hence a multiple precision subtract operation is coded. The handling of signed numbers is op- tional, as well as the zero suppression. They were included because it is easier to take them out than to try to divine where they go and how to do it. Many microprocessors have an instruction which maintains decimal numbers. Given the 8 bit quantity hexadecimal 79, assume a hexadecimal 02 is added to it, giving the hexadecimal value 7b. This instruction then can be used to adjust this result back to two decimal digits, 4 bits each. The value then would appear as hexadecimal 81, which can be thought of as adding the decimal numbers 79 + 2, giving 81. If computations are to be made in this packed decimal mode, then the Assumptions The assumptions for the procedures of this article are: 1. An input and output subroutine exists (GET and PUT) which pre- serve CPU registers except A. 2. The conversion process is itself a subroutine. 3. The conversion process need not save any registers. 4. Validating characters is done (though not necessary). 5. Overflow checking is done (again not necessary and in some instances not desirable). 6. All values are treated as unsigned integers (except the decimal rou- tines). 7. Non significant leading zeros are not required on input. 8. Leading zeros are printed on output (except for decimal). hexadecimal routine presented could be used to input and output these values. In conclusion, these routines are not presented as the final answer in number conversions. In order to implement any or all of these routines on your own personal computer, the flow diagrams may be more useful than the sample 8080 implementa- tion. That implementation is targeted for Intel's 8080 microprocessor, one of the most widely used hobby computers at the time of this writing. All the routines made full use of certain special features and strange quirks of the 8080 microprocessor. Whatever your particular machine, the time spent in under- standing these routines should save you a few headaches in your next program. ■ NOTES Note 1 : During a left shift, as the high order bit leaves the register, it enters the carry bit and the vacated low order bit receives a zero. For example: Before : Carry=0 A=1001 0111 After : Carry=1 A=001 1110 During a rotate left, as a bit leaves the high order bit position, that value is shifted into the vacated low order bit position. On the Intel 8080, two types of rotate are available: 1. RRL : rotate accumulator copying swapped bit to carry. before: Carry=0 A=1 001 0111 after: Carry=1 A=0010 1111 2. RAL : rotate accumulator thru carry before: Carry =0 A=1001 0111 after: Carry=1 A=0010 1110 On computers with a rotate through the carry bit, new bits can be shifted into the accumulator while old bits are shifted out. Note 2: Two's complement arithmetic uses the high order bit of a value to indicate sign; 1 is negative and is positive. A negative value is formed by complementing all bits of the value (1 to and to 1 ) and adding one. Thus, the largest positive value for a 16 bit quantity is a hexadecimal 7FFF, and the smallest negative value is a hexadecimal 8000, or decimal 32767 to -32768. The 8 bit values are 7F to 80 or 127 to -128. For example: given the value 1, create the value — 1. 0000 0001 = 1 Start with 1 1111 1110 Complement all 1 6 bits +1 Add 1 11111111=-! Giving the value -1. 60 Software Bug of the Month 4 Even when a program has been exhaus- tively tested, bugs can still occur. This month's tale concerns an overconfident pro- grammer who wrote a program, tested it extensively, and then bragged about it, to his ultimate regret. The program was supposed to test whether the number N was prime. If N was prime, it was supposed to set K = 1; otherwise, it would set K = 0. The idea was to test whether N is a multiple of 2, then 3, then 4, and so on. A trick was used, in that if N is not prime — that is, N = I* J — then either I or J must be less than, or equal to, the square root of N. Therefore we only need to test multiples of numbers up to the square root of N. The FORTRAN version of the program was as follows: SUBROUTINE PRIME(N, K) K = 1 I = 2 IF (MOD(N, K = RETURN 1 = 1 + 1 IF (1*1 .LE. RETURN END l).NE.O) GO TO 2 N) GOTO! Not satisfied with his ability to write a program that works the first time, our programmer tried out this one on a wide variety of test cases. All checked out per- fectly. Great was his despair, then, when the programmer down the hall said to him one day, "Hey, you know that bug we've been working on for about a month? You know what we just traced it to? Your little old prime subroutine!" (Please don't ask what a prime number testing subroutine was doing in a larger system.) What was the bug? [NOTE: The MOD(N,l) function returns the integer remainder of the division N/I.J Answer in Next Month's BYTE ■ SOLUTION TO BUG OF THE MONTH 3 What happened first was that the recog- nizer for a digit was called; it found the first digit in the unsigned integer, and quit at that point. Thus the rest of the unsigned integer was never found. The programmer tried to fix this by rearranging the BNF rule as ::= / (that is, putting the second case first). Unfortunately, this time, the first thing the recognizer did was to call itself; this made it call itself again, and so on, producing an endless loop. So the BNF rule was rear- ranged again: ::= / (that is, rearranging the order in the first case). This gave him his second endless loop. His last bug really should have been thought of first: he was working in PL/I, which allows subroutines to be recursive — but they have to be declared RECURSIVE, and this he had forgotten. i W Douglas Maurer University Library Room 634 George Washington University Washington DC 20052 If you want a microcomputer with all of these standard features . • • • 8080 MPU (The one with growing soft- ware support) • 1024 Byte ROM (With maximum ca- pacity of 4K Bytes) •1024 Byte RAM j (With maximum £ capacity of 2K Bytes) •TTY Serial I/O •EIA Serial I/O • 3 parallel l/O's •ASCII/Baudot terminal com- patibility with TTY machines or video units • Monitor having load, dump, display, insert and go functions • Complete with card connectors • Comprehensive User's Manual, plus Intel 8080 User's Manual • Completely factory assembled and tested— not a kit • Optional ac- cessories: Key- board/video display, audio cassette modem interface, power supply, ROM programmer and attractive cabinetry . . . plus more options to follow. The HAL MCEM-8080. $375 .then let us send you our card. HAL Communications Corp. has been a leader in digital communi- cations for over half a decade. The MCEM-8080 microcomputer shows just how far this leadership has taken us . . . and how far it can take you in your applications. That's why we'd like to send you our card— one PC board that we feel is the best-valued, most complete m microcomputer you can buy. For details on the MCEM-8080, write today. We'll also include compre- hensive information on the HAL DS-3000 KSR microprocessor- based terminal, the terminal that gives you multi-code compati- bility, flexibility for future changes, editing, and a convenient, large video display format. HAL Communications Corp. Box 365, 807 E. Green Street, Urbana, Illinois 61801 Telephone (217) 367-7373 61 The Circuit for Z-80s Dr Robert Suding Research Director, The Digital Group Inc PO Box 6528 Denver CO 80206 The microprocessor integrated circuit is the real engine for your system. Now you can replace that old engine with a real power house, the new Z-80 (the Z-80 was de- scribed in Burt Hashizume's Microprocessor Update on page 34 of August 1976 BYTE). After initially reading about this integrated circuit in early '76, I just had to get one to see how many of the blurbs were true (I give sales advertisements a \% credibility on the first pass). Aside from a few typos, promised sup- port chips that didn't show, and several mistakes in the software documentation, it was fabulous. The software flexibility added by this chip was a great addition to the 8080/6502/6800 Digital Group stable. The relative branch was very helpful for machine language programming, and the ability to test, set, and clear individual bits in a byte has opened a new world of control applica- tions. I saw a 20% savings in memory requirements even though I was still new to much of the Z-80's special software. The Z-80's hardware made good sense too. Getting rid of the 18 MHz crystal requirement of the 8224/8080 system and using a 2.5 MHz crystal with a simple single phase TTL clock made me happy. The interrupt and DMA system has some neat features. Sure gonna be hard to justify using the old 8080/6502 or 6800 CPU boards any more, thought I, as I set out to design the circuit for Z-80s. The circuit for Z-80s presented in this article is the actual wiring used in the Digital Group's Z-80 processor card. Not too un- believably, we would just love to sell you the whole system. The circuit is being published in complete detail for your information, whether you choose to purchase it as part of your system, or use it as a starting point for your own custom design. The systems ap- proach to microprocessors which I described in the June 1976 BYTE [page 32} is reflected in the design of this central pro- cessor circuit. This Z-80 circuit is shown in figures 1 and 2. In figure 1 you'll find the central pro- cessor integrated circuit (IC43, a Z-80 made by Zilog or second source Mostek), and miscellaneous drivers, decoders and gates. In figure 2 you'll find the wiring of 2 K bytes of programmable memory along with a 256 byte 1702A erasable read only memory which can be used to store the bootstrap programs for your system. Full direct memory access (DMA) is used in this design. What's DMA to you? Well for one thing, DMA permits hand loading of the memory from a front panel which is com- pletely independent of a particular proces- sor. It permits future processor upgrading by replacing a single board. High speed data devices, such as some tape, disk, and video systems which may operate too fast for most processors, can directly load memory using DMA. Finally, for the truly gigantic among you, multiple processors can share common memory with the addition of control logic. Buffering is included on this processor board design to permit driving a full memory system (64 K bytes) and up to 256 IO ports. Miscellaneous logical functions such as power on reset and single stepping are provided. The EROM bootstrap provides a con- venient way to initialize the system at power on, by using a low cost cassette [page 46, July 1976 BYTE] . We use an EROM in the design in order to allow customized initialization by sophisticated users able to program their own EROMs. Circuitry to inhibit EROM selection is included in order to permit full use of "0 page" programmable memory for user software. Two K bytes of programmable random access memory give sufficient storage for a small operating system. The Digital Group Z-80 system includes a cassette which loads this area of programmable memory with a system monitor which permits reading and 62 When inserting large integrated circuits into sockets, avoid uneven stresses. In extreme cases of uneven insertion pressure, it is possible to crack the case of a 24 or 40 pin integrated circuit, rendering it useless. writing other cassettes, keyboard entry of data and programs, and TV display of memory data, all 14 registers, indices, and flags (in octal or hexadecimal). The system used to interface this pro- cessor to memory and 10 exemplifies the "processor independence" ideal mentioned in my article in the June BYTE. Two sets of 16 address lines are brought out from each Digital Group processor card. The 16 lines labeled "memory address" in figure 1 lead to the memory boards; the 16 lines labeled "port address" in figure 2 go to the 10 port selecting card(s). Similarly, memory data to and from the processor is separated, as is the peripheral 10 data to and from the pro- cessor. The Z-80 DMA read, write and 10 lines are brought to decoding logic to derive your universal control lines, ie : me mory read ( MRP) , memory wri te (M WR), 10 read (IORD),and 10 write (I0VVR). The major objective of processor inde- pendency is supported by providing this common set of 32 address lines, 32 data lines, and 4 control lines for each processor. It is the responsibility of the processor board to provide the logical derivation of these 68 lines. The complete list of backplane con- nections for the system includes all 68 logic lines and is summarized in table 1. The rest of the system is interfaced to this common 68 line system. Processor interchange is thus particularly simple: It is achieved by plugging in a different processor card. Z-80 Processor Circuit The logic of this Digital Group Z-80 processor circuit may be logically divided into six interrelated sections. They are the processor itself and immediate "house- keeping" logic, run control, DMA, interrupt, buffering, and memory. The processor and immediate housekeeping consists of the Z-80, a 7400 single phase crystal controlled clock generator, and decoders for read, write, memory and 10 operations. These are all found in figure 1. A power on reset function is provided by IC38d, one section of a 4010 CMOS buffer. An external switch is attached to the back- plane assembly for a remote "reset and go" operation after power has been applied. A 7442, IC48, decodes IO states of the processor: memory reading, memory writing, input port reading, and output port writing. Each of these signals occurs at the proper time as determined by the processor. Run control logic permits single stepping through a program if a front panel readout is provided for viewing the resulting instruc- tion sequencing. In addition, wait states for slow external memory and the EROM access delay are provided. The wait line input of the Z-80 is utilized to control execution. A feature of this Z-80 circuit is the ability to jumper select either "single step" or "step on instruction." The jumpering for "single steps" permits stepping within an instruction cycle in the same manner as the 8080. "Step on instruction" will display only the first byte of each single or multibyte instruction. Normal processor running mode is unaf- fected by which stepping mode is selected. Two sections of a 7402, IC28a and IC28b, arc used as a run latch. When the step switch is activated, the run latch is reset, and the one shot (74123, IC37b) fires a 50 ms pulse to debounce the switch. The resultant pulse is held in a 7474 latch section, IC29a, for a very short time until synchro- nized by the Z-80 and acknowledged through the second oneshot section of IC37. The 7402 NOR gate IC28c passes either the continuous run or the step pulse depending on the mode selected. IC28d will then drop the ready line if either no run command exists (conlinous or step), or the "wait" command line goes high. If no "single step" operation is to be used, pin 43 of the backplane is tied to +5 V externally. Direct Memory Access The Z-80 has built-in features for direct memory access. The DMA logic supporting the processor consists of sections of IC44, IC29 and IC49. DMA is designed as an external request for control of memory and the granting of this request as soon as the processor can safely suspend its operations without losing current data. A DMA request is entered whenever either pin 8 or 9 of IC44c goes high. This will set a latch, IC29b, bringing down the Z-80's bus request line. Text continued on page 68 Contrary to some grape- vine rumors, you can't simply unplug your 8080 integrated circuit and plug in a Z-80. A glance at figure 1 and comparison of IC43's Z-80 pinouts with an 8080 specification will shoot that rumor down. Once you have a Z-80 wired, however, the in- struction set is a superset of the 8080 instruction set which provides a better general purpose processing architecture. 63 Figure I : The central processor of the Z-80 circuit. See also figure 2 for the balance of the logic found in the Digital Group Z-80 central processor card. This figure contains the processor integrated circuit, IC43, and ancilliary logic of the system clock, buffers, run control, interrupts and direct memory access control. A summary of back plane connections is found in table I accompanying BACKPLANE PINS DMAG RFSH MRQ MWR MRD H b a m m 10 RD 10 WR N.O. RESET BUTTON DMA END DMARO NMI RFSH MRO IORQ RD WD IC43 Z-80 CENTRAL PROCESSING UNIT WAIT ■PROCESSOR ADDRESS BUS- AO Al A2 A3 A4 A5 A6 A7 A8 A9 AIO All AI2 AI3 AI4 AI5 , PROCESSOR DATA BUS , DO Dl 02 D3 D4 D5 D6 D7 DMA GRANT WIRED TO: 48-12 32-1 32-15 31-1 31-15 30-1 30-15 47-1 47-15 42-1 41-1 41-15 0"CPU CONTROL I -DMA CONTROL DMA GRANT LSB IC4I 8T97 32 33 34 35 36 37 38 39 IC4I 8T97 24 RESISTORS - 2.2K BACKPLANE PINS- 2 4 6 7-Y-V- 3 5 7 IC4I 8T97 IC42 8T97 ■5V ■5V 14 12 10 2 7 -v- J v-v 13 II 9 13 IC42 8T97 IC42 8T97 IC47 8T97 IC47 8T97 MSB Y^^^^^^^^i^^^^-f -5V •5V •5V 2 14 6 14 7-V-V- 3 5 7 LSB IC30 8T97 IC30 8T97 IC30 8T97 14 12 10 IC3I 8T97 D7 LOCAL DATA BUS + 5V ■5V ■5V 46a66QQ^466afiafiy &&&&!;&&& AO Al A2 A3 A4 A5 A6 A7 A8 A9 AIO All AI2 AI3 AI4 A 15 MEMORY ADDRESS MOO MOI M02 M03 M04 M05 M06 M07 MEMORY OUTPUTS 64 this article. The complete list of power connections for both figures 1 and 2 is found in table 2. This schematic was redrawn to fit the constraints of the magazine page. A complete schematic in its original form, drawn on one page, is included with the documentation of the Digital Group Z-80 central processor kit. STOP/ STEP IC3I 3T97 D IT IC l\J C *T O II wiawis POI P02 P03 P04 P05 P06 P07 PERIPHERAL OUTPUTS f f IORD 8 DIODES IN9I4 (OPTIONAL PROTECT- ION) ,3 ,J ,J | J , J , J , J , J 2.2K aaa^A6A H UH H STORS M.IO Mil MI2 MI3 MI4 MI5 MI6 MI7 MEMORY INPUTS PIO PI I PI2 PI3 PI4 PI5 PI6 PERIPHERAL INPUTS PI7 Table 1: A Generalized Processor Independent Bus Structure. This table lists connector pin identification, signal name, DMA access properties, primary signal direction relative to the processor card, and description. This is the bus definition used in the Digital Group systems. DMA In or Pin Name G? Out? 1 2 3 4 5 - _ _ MI7 IN "> 6 MI6 IN 7 MI5 IN 8 MI4 IN 9 MI3 IN 10 MI2 IN 11 Mil IN 12 MIO IN J 13 M07 G OUT "> 14 M06 G OUT 15 M05 G OUT 16 M04 G OUT 17 M03 G OUT 18 M02 G OUT 19 M01 G OUT 20 MOO G OUT., 21 MRD- G OUT 22 AO G OUT "* 23 A1 G OUT 24 A2 G OUT 25 A3 G OUT 26 A4 G OUT 27 A5 G OUT 28 A6 G OUT 29 A7 G OUT 30 A8 G OUT 31 A9 G OUT 32 A10 G OUT 33 A11 G OUT 34 A12 G OUT 35 A13 G OUT 36 A14 G OUT 37 A15 G OUT^ 38 MWR- G OUT 39 RFSH- G OUT 40 DMARQ IN 41 DMAG OUT 42 DMAEND IN 43 RUN IN 44 STEP IN 45 WRQ- IN 46 MRQ- G OUT 47 RESET- IN 48 ROMCE- OUT 49 _ _ _ 50 — — — Description +5 V power bus System ground bus Spare voltage bus —5 V power bus (not used by Z-80) Input data from memory V Output data to memory Memory read data strobe V Memory address lines Memory write data strobe Refresh line (Z-80) for dynamic memories DMA Request #1 DMA Grant DMA end signal Run if logic 1 , stop or step if Stop if and RUN » 0;single step each 1 pulse. Wait request, from external slow memories Memory request Reset signal ROM on processor board is enabled; do not decode page 0. + 12 V power bus —12 V power bus Pin A B C D Name DMA G? In or Out? E PI7 F PI6 H PI5 J PI4 K PI 3 L PI2 M PI1 N PI0 P R S T P07 P06 P05 P04 U P03 V P02 W P01 X POO Y IORD- Z PA0 AA PA1 AB PA2 AC PA3 AD PA4 AE PA5 AF PA6 AH PA7 A J PA8 AK PA9 AL PA10 AM PA11 AN PA12 AP PA13 AR PA14 AS PA15 AT IOWR- AU IRQ- AV » AW * AX " AY " AZ NMI- BA ROMDIS BB DMARQ BC BD * BE BF - G G G G G G G G G G G G G G G G Description +5 V power bus System ground bus Spare voltage bus —5 V power bus (not used by Z-80) >- Input data from peripherals IN IN OUT Output data to peripherals Peripheral read data strobe V Peripheral address, low order, identical to A0 through A7 in Z-80 processor. >- Peripheral address, high order, wired to ground (logical 0) in Z-80 processor. Peripheral write data strobe Interrupt request line Cassette bootstrap: Data output Output port 1 bit Cassette bootstrap: Data input Input port 1 bit Non maskable interrupt input Bootstrap ROM disable DMA Request #2 unused Valid memory address (6800, 6502 systems) +12 V power bus — 12 V power bus NOTES: "G" in the "DMA G?" column indicates that the signal is in a high impedance state when the DMAG signal is logical 1. This means that the line in question can be driven by an alternate three state driver during a DMA operation. If the signal is not disabled by DMAG, then this column is blank. In the "Name" column, if the name is followed by a minus sign as in "MRD-", then the signal is active low. This is indicated in the logic diagram by a bar over the name in question. An "*" in the name column indicates a signal which is not defined by the processor circuit of figures 1 and 2 in this article. "In or Out?" is relative to the central processor card. Figure 2: The Digital Group Z-80 processor card also includes this memory subsystem. Memory banks and 1 are programmable user memory typically decoded to addresses at split octal locations 000/000 to 007/377, hexa- decimal 0000 to 07FF. The programmable jumpers J A 13, J A 14 and J A 15 in this diagram are used to pick the base address for these memory banks, and allow the lower two I K blocks of any of the eight 8 K blocks in the Z-80's 64 K memory address space. The read only memory, IC20, is enabled during bootstrap. During bootstrap, since the ROM addresses overlap the pro- grammable memory a ddresses at locations to 377 octal (0 to FF hexa- decimal) the ROMCE line is used to disable any programmable memory ref- erences to page 0. A fter bootstrapping the programmable memory exclusive of page 0, the ROM becomes invisible to the system when the ROMDIS line is in a high state. (This line should be controlled by a manual switch.) *~ AAAAAAAA &MMMMA MAAAAAA % MmmmmiiMM r-tOn^iON— O oooooooo 1333X333 33X3X333 <<<<<<<<<<<< < < ? 5 0.0.0.0.0.0.0.0.0.0.0.0.0.0.0-11 67 One way to test out a newly constructed circuit (not necessarily the best way) is the traditional "smoke test": Turn on power and see if the circuit burns up. A far better method is to do a little thinking and careful inspection first. Text continued from page 63 When the Z-80 is finished with any needed housekeeping, it issues the bus acknowledge signal, granting the request. Further Z-80 operations are suspended and the various buffers, IC31, IC32, IC33, IC41, IC42 and IC47, go to a high impedance state, and the external circuitry making the request is allowed full control over memory using the backplane bus. DMA request and grant is ended by any of three methods. A reset operation will always end any current DMA operation. A jumper at pin 9 of IC29b allows selecting one of the other two DMA ending opera- tions. If the jumper is connected from pin 9 to pin 10 of IC29b, then the DMA operation will be ended whenever both DMA request lines return low. If the jumper is connected from pin 9 of IC29b to the line labeled DMA end, then a latched DMA operation results. One or more positive going pulses at either DMA Request line will initiate DMA. One or more positive going pulses at the DMA end line will end the DMA. Interrupts The Z-80 has extended interrupt process- ing capabilities, and sufficient hardware is included on the Digital Group Z-80 board to support the three Z-80 interrupt modes. Mode is the same as the 8080A, generally considered as the eight restart instructions which are placed on the data bus upon an interrupt acknowledge signal from the pro- cessor. Mode 1 is an automatic interrupt to address 000070. Mode 2 is an extremely powerful vectored interrupt system which is new with the Z-80. A new register, called the I register, is used as a high order portion of the vector address. When an interrupt is encountered and acknowledged, the data placed on the data bus becomes the low order portion of the interrupt vector ad- dress. Interrupt processing thus starts at an arbitrary 16 bit address formed from the I register and a variable input. Another inter- rupt system provided by the Z-80 is called non maskable interrupt (NMI). This inter- rupt will occur anytime the Z-80's pin 17 is brought low, and is intended for highest priority operations like responding to a power failure before the power supply capacitors bleed down. IC50, IC44, IC36, IC35, IC34 and IC27 provide the needed interrupt processing interfaces. The 74125s of IC34 and IC35 provide three state buffering for the inter- rupt address vectoring required by Z-80 interrupt modes and 2. The 7442, IC27, produces an interrupt honored acknowledge- ment signal (if required) for use in mode 0. The INT input at the Z-80 pin 16 will be forced low whenever any interrupt input, except NMI, is brought low. Interrupts are interfaced using a 16 pin DIP socket. Buffering The Digital Group processor circuits are designed to drive a full complement of memory and IO. In addition, the processors are designed to operate under direct memory access as mentioned previously, and three state buffers permit isolating the processor card from its own (see figure 2) and auxil- iary memory. Sections of 8T97s IC41, IC42 and IC47 provide buffered address outputs from the Z-80 processor with each section capable of each driving 30 standard TTL loads. These drivers handle both memory and IO port addressing. DMA grant is connected to these drivers so that when a DMA is in process, the external device is given full control of the address lines since the processor's drivers are in a high impedance state. The 8T97 sections used for data output, IC31 and IC32, provide the ability to drive as many as seven Digital Group IO boards (28 ports) without further buffering. Data input to the processor is placed onto the internal bidirectional bus by two types of circuits. A pair of 741 25s provides a three state noninverted buffering of memory input from a backplane bus (pins 5 to 12) which has noninverted data. A pair of open col- lector 7403s, IC40 and IC46, provide an inverted open collector drive of the same bus, a requirement since the Digital Group peripherals put data onto the backplane in inverted form. Notice, however, that the pin connections of the 7403 are compatible with the 74126 circuit, so if you desire to use this design with noninverting peripherals simply replace the 7403s with 74126s to change the sense of the data on the outputs of the receivers. Memory (see figure 2) in this Z-80 proc- essor circuit is of two types, EROM and programmable memory. The EROM is a single chip preprogrammed by the Digital Group to simplify system operation of our kits. If you roll your own software, a customized bootstrap EROM could also be used. When power is applied to the system, a "power on reset" function results, which starts the processor running at address 000 000. IC29 and IC25 decode the lowest 256 bytes of memory, resulting in a EROM chip enable condition. The EROM proceeds through its programming to clear the screen, display a message, initialize some program- 68 mable memory addresses, and control initial cassette reading. Two K of programmable memory allows an extensive operating system to be entered from cassette. Sixteen 2102s are arranged as two banks of 8 integrated circuits. Which of the two banks selected (if either) is a function of decoding by IC23, IC24 and IC25, as well as the three jumper settings. The 7442 will assign the two banks of 21 02s as the bottom 2 K of any one of eight 8 K blocks in memory address space. The three jumpers permit assigning the processor's 2 K programmable memory to addresses other than the bottom 2 K. When a user wishes to add one or more Digital Group 8 K boards to his or her system, the processor's 2 K may be moved to fail above the highest address of the supplemental 8 K board. Example: A user has two Digital Group 8 K memory boards on his system. By assigning the processor circuit's 2 K to the address range of 16 K to 18 K, one memory board to to 8 K, and the other to 8 K to 16 K, an 18 K system results, with all active memory in the low address range. The EROM used for bootstrapping is a relatively slow device, so the processor must be forced to wait for its data access. A 74121 provides a 475 ns delaying pulse to the processor when either the processor EROM is accessed or an external slow memory access is required. Since the Digital Group programmable memory cards are built using 500 ns access time (or faster) 2102 static memories, the processor nor- mally runs at full speed. Some Notes on Construction While the circuit diagrams of figures 1 and 2 provide the information needed to wire wrap or hand wire your own Z-80 processor, I'll bet you'll find the Digital Group processor board in our kit to be a worthwhile time saver. This Z-80 processor card is manufactured using two sided FR-10 printed circuit board material and measures 12 inches wide by 5 inches high (30.5 cm wide by 12.7 cm high). It has a dual 50 pin (100 terminals in all) connector to the backplane assembly. The definition of sig- nals at the connector is provided in table 1. The Digital Group board is not "Altair compatible" due to two major system con- straints: processor independency and use of a single fully protected external power supply. These design goals ruled out the bus structure supported by MITS and indepen- dent suppliers of peripherals for MITS systems. Experienced designers will un- doubtedly interface the Z-80 to the "Altair bus" but the processor dependency problem will remain. Some experimenters may wish to custom design this Z-80 into their own system. The circuit of figures 1 and 2 should provide sufficient details of the Z-80's opera- tion to assist you and provide a starting point. Further detailed information on the Z-80 chip and its specifications is of course available from its manufacturer, Zilog Inc. Testing After building the processor circuit, but before inserting any of your (socketed) integrated circuits, try a little preliminary testing with an ohmmeter. Check for a short between backplane terminals 1 and 2, 2 and 50, and 1 and 50. I and 2 should show an initial momentary low resistance and then approach infinity as power supply bypass capacitors charge up. 2 and 50 will show some resistance due to the zener, and to ohmmeter polarity, but not a short. Two techniques are possible at this point. One way (referred to in the fine print of traditional literature as the "smoke test") is to plug in all integrated circuits and insert the card in a backplane assembly wired for Only $59.95 Assembled Tested '' PerCom FINALLY - A CASSETTE INTERFACE THAT WORKS! The PerCom CI-810 • Easily connected to any computer • An 8-bit parallel interface • 'Kansas City' Standard • Load a 1k byte program in 40 seconds • Little or no software required • Easily upgraded to 218 byte/sec • Operate 2 tape units simultaneously • 18 page Instruction Manual PerCom Data Co. 4021 Windsor, Garland, Texas 75042 (214) 276-1968 'peripherals for persona/ computing' 69 Table 2: Power connections for the Z-80 processor circuit shown in figures 1 and 2. Note that IC8 and IC9, IC18 and IC19 are omitted from the numbering sequence. Number Type +5 V GN ICO 2102 10 9 IC1 2102 10 9 IC2 2102 10 9 IC3 2102 10 9 IC4 2102 10 9 IC5 2102 10 9 IC6 2102 10 9 IC7 2102 10 9 IC10 2102 10 9 IC11 2102 10 9 IC12 2102 10 9 IC13 2102 10 9 IC14 2102 10 9 IC15 2102 10 9 IC16 2102 10 9 IC17 2102 10 9 IC20 1702A 12,13, 15,22, 23 IC21 74121 14 7 IC22 7400 14 7 IC23 7442 16 8 IC24 7404 14 7 IC25 7420 14 7 IC26 7430 14 7 IC27 7442 16 8 IC28 7402 14 7 IC29 7474 14 7 IC30 8T97 16 8 IC31 8T97 16 8 IC32 8T97 16 8 IC33 7404 14 7 IC34 74125 14 7 IC35 74125 14 7 IC36 7430 14 7 IC37 74123 16 8 IC38 4010 16,1 8 IC39 74125 14 7 IC40 7403 14 7 IC41 8T97 16 8 IC42 8T97 16 8 IC43 Z-80 11 29 IC44 74LS02 14 7 IC45 74125 14 7 IC46 7403 14 7 IC47 8T97 16 8 IC48 7442 16 8 IC49 7440 14 7 IC50 7400 14 7 ■800 ns- -9 V 16,24 Figure 3: Central processor clock timing waveform. To verify the frequency of oscil- lation with a calibrated oscilloscope, mea- sure the total time interval for two cycles of the clock waveform. This interval should be 800 ns if the correct crystal is used and it is oscillating at its fundamental frequency. A frequency counter would show 2.5 MHz as the frequency. power. Another way is to insert only one or two integrated circuits at a time, function by function, and test as you go. The Digital Group has found a compromise which seems to work best when building kits, namely to plug in all but most critical or expensive integrated circuits, then test. This approach is optimal when using printed circuit wiring since the probability of a disastrous wiring error is in general low, assuming a fully debugged printed circuit board. Then if OK so far, plug them in and go ahead. So, proceeding with this approach, insert all integrated circuits except the Z-80, the 1702A, and the 2102s. Note that all inte- grated circuits except 2102s in the Digital Group Z-80 board have their keyway or dot indicating the pin 1 end oriented away from the connector. Measure the resistance at the backplane voltage supply pins again. In particular, note the lower resistance value between back- plane pins 1 and 2. Reverse the ohmmeter and remeasure. A shorted reading now indi- cates a bad integrated circuit, and near equal readings indicate a reversed integrated circuit somewhere. Now insert the crystal into its holder. In our Digital Group kits this is done by snapping in the body of the crystal (gently), then pushing forward to contact the pins. Before inserting the processor card into its backplane connector, measure the volt- ages at the connector. A single wrong voltage may cost you a board's worth of ICs. Measure these backplane pins against ground: Pin 1 - +5 V ±5% Pin 2 - OV Pin 50 12 V+10% (The backplane pin 1 end is marked on the Digital Group Z-80 processor card. If you use a homebrew assembly, use the equivalent test before proceeding.) Make a final inspection of the processor. Check for shorts between components on the top and lines running underneath. In kit systems, look for any solder bridges. Check the proper pin 1 orientation of all your integrated circuits. If you use the printed circuit, sight down the rows of pins for missing solder points. Missed solder points typically seem to occur at the end pins of integrated circuit sockets, and one side of resistors or capacitors. After all this preliminary checking you can insert the processor board into its connector. Apply power to the system and again measure voltages at the processor card as noted previously. 70 Checking Your Waveforms Connect a calibrated triggered sweep oscilloscope to pin 6 of the 7400 IC50b. Set the triggering to occur on the positive edge, and the sweep setting to 100 ns per division. Look for a two cycle time of 800 ns seconds as shown in figure 3. If your oscilloscope does not sweep as fast as 100 ns/div, then a slower sweep can be used; but be absolutely sure that the two cycle time is exactly 800 nanoseconds as shown in figure 3. A frequency counter may also be at- tached to pin 6 of IC50b. The desired frequency is 2.5 MHz. Any appreciable error indicates either a defective crystal, a bad 7400, or an overtone oscillation (one way to correct this last case is by using 74L00 for IC50). Measure the voltage at the following pins (before expensive integrated circuits have been inserted). Correct any discrepancy. Z-80 (IC43) 1702A(IC20) Any 2102 RAM: pin 29 = V pin 11 =+5 V pins 24 & 16 = -9 V pins 12, 13, 15,22 and 23 = +5 V pin9 = 0V pin 10 = +5 V Carefully insert the Z-80, the 1702A, and the 2102s. With the large Z-80 and 1702 circuits, insertion should be done evenly without allowing excessive stress. Packages have been known to crack into two parts during insertion. Make sure that pin 1 (indicated by either a dot or a 1 on these circuits) is properly oriented. Recheck the processor circuit asembly for orientation, lead shorts, solder shorts, and missing solder joints. Think courageous thoughts. Plug in the processor board. Bravely turn on power. Using the Z-80 Processor Card Several operational systems structures (see my June 1976 BYTE article) are con- sistent with this processor circuit design. This Z-80 circuit can be used with a minimal amount of additional hardware (a PIA and UART, a Teletype machine, and a suitably programmed EROM) as if it were an "evalu- ation board" that maintains system de- pendency so that different processor integrated circuits may be compared. Preferably, this board becomes the key component in a much larger general purpose system. A special EROM is provided in the Digital Group Z-80 kit which interfaces this Z-80 board to our audio cassette and TV based system structure. A cassette of pro- gramming is provided with our kit version, which loads programmable memory with an Fully Tested S.T.M. SYSTEMS Not a Kit Presents BABY! A complete microcomputer in an attache case. The unit uses the MCS 6502 8 Bit Microprocessor. Up to 4K RAM fully buffered * Slot for 4K ROM (2708 type) DMA, Video Interface (composite video) sixteen 32 character lines. Audio cassette Interface (data rate approximately 1200 BPS load & dump). I/O ports with 1 PIA 6820, 6520 type. Typewriter type 63 key keyboard, (upper and lower case plus Greek with control key). Power supply 1 20 VAC to 5 volt 3 amp fully regulated. Speaker, two (2) LEDs, DMA, 60 Hz real time clock, video on and off keyboard and audio cassette dump and load format all under program control. The first 200 systems sold will have a frosted Plexiglas case! Standard unit will have molded plastic case, Plexiglas case will become an option. Audio cassette tape supplied with dump program, text editor, games of Shooting Stars, Life and Ticktack Toe, Music Program (self generated computer music and user generated from keyboard). *Basic unit with 2K RAM and 512 Byte bootstrap loader and monitor in firmware (PROM) ... $ 850.00 Unit with 4K RAM $1000.00 Remember it's not a kit, it's fully tested and ready to go. Just plug BABY! in hook up your video monitor, load your auto cassette with the programs we supply and you're off and running. Optional Video Monitor $150.00 Be the first person on your block to have this unique, completely portable system. ORDER TODAY: S. T. M. SYSTEMS P.O. Box 248 Mont Vernon, N.H. 03057 D BankAmericard Exp. □ Master Charge No. □Cashier's Check □ Money Order Personal Check (allow 6—8 weeks for personal check to clear.) Delivery 60 to 90 days after Receipt Of Order Name Address City State Zip Ask for our OEM discounts on customized version. operating system for reading and writing cassettes, and building and displaying programs. Conclusion The Z-80 is a neat chip to use. Contrary to some grapevine rumors, you can't simply unplug your 8080 integrated circuit and plug in the Z-80; but it is an architecturally simple chip to design with. I hope this design excites you as much as the Z-80 excited me. Enjoy." 71 TDL IS PROUD TO ANNOUNCE THE REVOLUTIONARY Z-80 CPU CARD, AN ALTAIR/IMSAI COMPATIBLE CPU CARD FEATURING THE POWERFUL Z-80 UP PRODUCED BY ZILOG INCORPORATED. WHAT'S SO REVOLUTION- ARY ABOUT THE Z-80? A LOOK AT THE FOLLOWING COMPARISONS WILLSHOWYOU: As you can see, the Z-80 is a very powerful and fast uP - in fact its a NEXT generation microprocessor. And its available to you in a totally compatible format, NOW. Just unplug your current CPU card, plug in the Z-80 CPU, load a program, and you're up and running - with a NEXT generation uP. The power and versatility of the Z-80 is unequalled in the uP field, and it opens the door to tremendous developments in the state of the art. More powerful, faster, and less memory consuming versions of your current 8080 software are just a part of the possibilities the Z-80 provides. (TDL's own 8-K BASIC for the Z-80 will be available in September.) Each Z-80 CPU kit comes complete with: • Prime commercial quality boards, IC sockets etc. • easy to follow instructions • Zilog's Z-80 Manual • Schematics • An easy to understand and apply user's guide • TDL's Z-MONITOR on paper tape (soon to be available in deluxe PROM version) • And membership in the Z-80 user's group. Move up to the Z-80. Only $269. THE FASTEST RAM? The high speed capability of the Z-80 demands an extra- fast RAM to back it up, and TDL's new Z8K RAM board fills the bill. The Z8K is an 8K by 8 static RAM with the fastest access time in personalcomputing-215ns. Its the only RAM in personal computing fast enough to let the Z-80 run at full speed with no wait states. If that isn't enough, it also happens to be one of the lowest powered RAMs around as well. Only 150 ma typical current load on the 5V supply. That makes the Z8K run cool -and perfect for battery standby opera- tion as well. Other so-called "low power" 4K RAM boards can't compete with these specs. Its the perfect match for the Z-80, and its features and low cost make it a perfect match for ANY uP. (It's fully Altair bus compatible of course...) Price: Only $295 WHAT ABOUT QUALITY? All TDL products share one thing in common - exceptionally high quality. The quality starts with engineering that is dedicated to keep your system state of the art at the lowest possible cost. Consider also the "Qual Division" whose ONLY purpose is Comparison of the Zilog Z-80, Intel 8080, and Motorola 6800CPU chips Z80 8080 6800 NUMBER OF: Instructions Internal Registers Addressing Modes Voltage Required Standard Clock Rate Clock Phases Clock Voltage DynamicRAM refresh and timing signals without slowing down CPU or requiring additional circuitry Single instruction memory to memory and memory to I/O BLOCK TRANSFERS Single instruction SET, RESET, or TEST of any bit in accumulator, any general purpose register, or any external memory location Single instruction BLOCK SEARCH of any desired length of external memory for any 8-bit character Non-Maskable Interrupt and TTL compatible inputs Internal sync of inputs and direct strobe of outputs 158* 78 72 17 7 6 10 7 8 +5 +5,-5 + 12 +5 DC-3MHZ 0.5-2MHZ 0.1-1MHz 1 2 2 4.2 8.4 4.8 Yes No No Yes No No Yes Yes Yes Yes No No No No No Yes No No • Includes all 78 machine code instructions of the 8080A and is therefore capable of running any standard 8080A software without modification. ADDITIONAL FEATURES OF THE Z-80: • Up to 500% more throughput than the 8080A • Requires 25% to 50% less memory • Three modes of fast interrupt response • Outperforms any other microcomputer space than the 8080A CPU plus a non-maskable interrupt in 4-, 8-, 16-bit applications to keep TDL's products the best in the industry. And our products use only the finest boards available, prime components, sockets for all ICs, gold plated edge contacts and other earmarks of a commercial grade product. And its backed by a solid 90 day guarantee on parts and materials. SAVE MONEY NOW Order both a Z-80 CPU card, and one or more Z8K RAM boards before September 1st, 1976, and you can deduct 10% on the total cost. Act now while this special offer lasts. (Does not apply to COD orders.) HOW TO ORDER Just send check or money order, or use your BankAmericard or Mastercharge, and your orders will be shipped to you postpaid within 30 days. COD orders must be accompanied by a 25% deposit. Your credit card order must include the serial # of the card, expiration date, and your order must be signed. New Jersey residents add 5% state sales tax. For more information, send for our free catalog. Dealer Inquiries Invited TDL (609) 392-7070 72 /TECHNICAL DESIGN LABS INC. f 342 COLUMBUS AVENUE TRENTON, NEW JERSEY 08629 Attention: Southern California Readers, Educators Here is a bulletin board listing of a new course which is probably worth taking if you're a novice, or emulating if you're an instructor. The prospect of a computer in every home, shop and classroom is no idle "cam- paign promise" to one professor at Cali- fornia State University, Long Beach. "If you can't buy one, build one," is one of several approaches taken in three com- puter courses to be offered on Saturdays beginning September 4 through the CSULB School of Education. All three courses are designed for non-technical people: teachers, librarians, businesspeople; hobbyists or homemakers. The instructor, Richard C McLaughlin, associate professor of instructional media, says that "some years ago, as a junior high school science teacher, I realized that my role in life was not developing future scien- tists but rather promoting an appreciation of science and technology among our entire population." His background includes a bachelor's degree cum laude in physics from the State University of New York at Albany and a PhD in instructional communications from Syracuse University. He has recently been active in the Southern California Com- puter Society, the California Educational Computing Consortium and the North Orange County Computer Club. While some attention will be paid to traditional computers and minicomputers in these courses, by far the greatest emphasis will be placed upon low cost general purpose computers. These are now available as do-it- yourself kits (about $1000) or already as- sembled and waiting to be plugged in. Prof McLaughlin's courses can be of great use to people having little or no background in computer technology but willing to learn. The purpose of the courses will be to acquire a functional understanding of com- puters resulting in practical applications. The first five Saturdays will constitute a course on the building of a microcomputer. No actual construction will be required, but the class should be of immense value to anyone using a microcomputer (or a larger mini- computer) or planning to build one from a kit. The second course of five Saturdays will cover programming any type of computer (large timesharing service, minicomputer or personal computer system) in the conversa- tional BASIC language now used in many schools and businesses throughout the nation. The last five Saturdays will be devoted to a course on using computer terminals and setting up work stations tailored to the end user's special needs, be they in the class- room, library, shop or home. The three courses begin on September 4, October 9 and November 13, running from 8:30 AM to 2:30 PM. Each course is worth two credit units and may be taken inde- pendently according to the student's own needs. Classes are open to all high school graduates, college students and adults. Per- sons not formally admitted to CSULB may enroll at $66 per course through the Office of Continuing Education, 1250 Bellflower Blvd, Long Beach CA 90840. Telephone: (213) 498-5561." Microcomputer Interfacing Workshop September 23, 24, 25, 1976, a three-day workshop based on the popular 8080 micro- processor, sponsored by the VPI and SU Extension Division of the Continuing Educa- tion Center in Blacksburg VA, will include many hours of experience in programming and interface construction with over 12 operating microcomputers for participant use. For more information contact Dr Norris Bell, VPI and SU Continuing Education Center, Blacksburg VA 24061, (703) 951-6328." Functional Specification: Altair Bus Driver A question which has recurred in several letters is "How do I interface my simple 8 bit bidirectional bus to an Altair compatible peripheral?" What is needed is an article which defines the signals of the Altair back plane and gives an interface plan and design for making an Altair compatible extension bus to an arbitrary 8 bit processor such as the 6800, 6502, 8080, Z-80, 2650, etc. Such an article must include a table of pinouts, power and logic requirements, photographs of a prototype and a rough description of the processor and system in which it is used." 73 . <■< ^r «•? o* CO*** ?to A*<* 8 Video Terminal Interface: Connects to standard TV monitor or modified receiver to display 16 lines of 32 or 64 characters. Characters are formed in a 7 x 9 matrix for easy readability. Char- acter set includes 128 upper and lower case ASCII characters and 64 graphic characters for plotting on a 48 x 64 (48 x 128 with memory option) array. An 8-bit input port is provided for the keyboard. Characters are stored in the onboard memory, which may be read out of or written in to by the computer. Cursor control, text editing, and graph- ics software is included. $185 (32 char.) kit. $210 (64 char.) kit. Poly I/O Idea Board: This will save you a lot of time in making prototype circuits. I/O port address is selectable with dip switch, and inputs and outputs are fully buffered. $55 kit. Analog Interface: Good for interfacing your computer to an analog world. Ten bits of resolution in and out. $145 for one channel and $195 for two channels (kit). Ask about how to get a free POLY I/O Idea Board or Analog Board. 8K RAM on a single board. Connection for battery backup. $300 kit. Special Offer Video Terminal Interface (32 character) and 8K RAM, $450 kit. Expires - September 30th, 1976. You've probably been hearing about the POLY 88 microcomputer system that uses keyboard and video. We don't have the space here to describe all the fea- tures. See it at your local computer store. Support your local computer store. All prices and specifications subject to change without notice. Prices are USA only. Calif, residents add 6% sales tax. All non-paid orders add 5% USA shipping, handling, and insurance. (Outside USA add 10%) Bankamericard and Master Charge accepted. PolyMorphic Systems 737 S. Kellogg, Goleta, CA 93017 (805) 967-2351 What's New? OSI 400 System Ohio Scientific Instruments, 11679 Hay- den St, Hiram OH 44234, has announced the "Model 400 Superboard" single board com- puter. The board itself, minus components, sells for $29 and will work with either the MOS Technology 6502 or the Motorola 6800 central processor circuits. The board has slots for 1 K bytes of memory, 1 6820 PIA, one 6850 PIA, current loop (Teletype) and RS-232 serial interfaces. A complete kit for a 6502 version with monitor PROM and parts for a Teletype current loop interface is $139, and the same kit for a 6800 processor is $159. Also available is the Model 470 floppy disk, the Model 420 memory expan- sion board, the Model 430 IO board, and the Model 440 video graphics board. Write for the OSI catalog brochure about their boards, kits and assembled products." Advance Information Lloyd Rice of Computalker has forwarded to BYTE a copy of the "advance announce- ment" brochure on the Computalker CT-1 Speech Synthesizer. The price of this unit will be $395 in Altair/IMSAI/Polymorphic compatible plug-in board form. Target date for hardware delivery is September 1 1976. All Computalker CT-1 customers will be supplied with the CSR1 software driver package which features "a sophisticated synthesis by rule system incorporating the latest research findings on human speech .... Versions are planned for the 8080, 6800 and 6502 CPU chips." Write Computalker, 821 Pacific St No. 4, Santa Monica CA 90405, for the brochure, which also is accompanied by a reprint of Lloyd's article in the April 1976 issue of Dr Dobbs' Journal of Computer Calisthenics and Orthodontia.* Catalog for Electronics Designing and Testing 59 Ways to Save Time and Money Design- ing and Testing in Electronics, a full color 32 page catalog of electronic prototype bread- boarding and test equipment, has been intro- duced by Continental Specialties Corpora- tion. The catalog is said to have a lot more utility than simply displaying CSC products and prices; it is billed as "a handy problem- solver for electronics hobbyists as well as working designers, technicians and produc- tion people who want to save time and money in every aspect of design, production and QC testing." The catalog, which includes a list of domestic and foreign distributors, is available free from Continental Specialties Corporation, 44 Kendall St, POB 1942, New Haven CT 06509." Right from the Source Intersil, manufacturer of the IM6100 PDP-8 compatible microcomputer, has just announced their version of the prototyping and evaluation board needed to try out the microcomputer. The "Intercept )r" system is a tutorial trainer utilizing Intersil's IM6100 and related CMOS devices. Accord- ing to the manufacturer, "the system pro- vides students, hobbyists and designers with practical low cost exposure to micro- processors, RAMs, PROMs and input output interfacing." The Intercept Jr product recognizes the instruction set of Digital Equipment Corpo- ration's PDP-8/E™ minicomputer and pro- vides an operating CMOS microcomputer on a 10 by 11 inch (25.4 by 27.9 cm) double sided printed circuit board. Also on the 74 board are a keyboard, two 4 digit LED displays, a "resident microinterprcter," and a battery power supply. The extra boards shown in the photo include a CMOS 1 K by 12 bit programmable memory module with its own battery backup for non-volatility, a 2 K by 1 2 bit PROM module and a serial 10 interface which has both RS-232 and 20 mA current loop capabilities. The Intercept )r system comes com- pletely assembled and factory tested with batteries. Power terminals are also provided to enable running the system from a 5 or 10 V power source. The owner's handbook contains full details of the system's opera- tion, a hardware description and basic pro- gramming techniques. The prices are well within the range of the individual who wants a PDP-8 compatible machine: The basic computer module is $281, the program- mable random access memory module is $145, the PROM module is $74.65, and the IO module is $81.70. A computer store could easily buy these modules, put them inside an attractive case and have a com- mercial finished product with a well known instruction set. According to the Intersil people, all modules are in stock for immedi- ate delivery. For information and ordering contact Intersil Inc, 10900 No Tantau Av, Cupertino CA 95014." Software New Product: 8080 TRACE Program The 8080 TRACE Program is a valuable software development tool which speeds and simplifies 8080 program debugging. TRACE performs its function by executing the problem program's instructions under TRACE control and provides the pro- grammer a visual display of the program counter (PC), contents of the status word (SW) and registers A through L for each executed instruction. Thus, deviations from expected performance are readily recognized and corrected with minimal programmer participation. TRACE uses an IO terminal such as an octal keyboard and display device for entering TRACE run parameters and dis- playing register contents dynamically. The instruction location is displayed for each instruction executed within the address limits specified by the programmer at TRACE initiation time. The sense switches can be used optionally to select registers for display during the program's run time. The TRACE program listing and descrip- tion are available for $7.50; an Altair ACR- compatible cassette tape is included for $10. For additional information, send SASE to R E Rydel, 1411 Northgate Sq, Apt 21 B, Reston VA 22090." Meet the new OSI400 Computer System. Now more performance and more flexibility actually cost you less. Ask yourself how much system you need. Or how little. Whatever the answer, even if you want to change it later, you get more system for less money with the OSI 400. Start with the OSI Superboard. Add your choice (!) of a 6502, 651 2 or 6800 microprocessor; eight 21 02s for 1 024 bytes of RAM; and an external front panel. Power it up and you have a working CPU. Or populate the board with a processor, system clock, 512 bytes of PROM, 1024 of RAM, an ACIA with RS-232 or 20 ma loop interface, a PIA with 16 I/O lines and full buffer- ing to as many as 250 system boards for system expansion. Even fully populated, Superboard costs less than $140 with a 6502, less than $160 with a 6800. But take a look at what you can have for $29. Our special offer includes a plated-through-hole G-10 epoxy Superboard, bare, plus a 50-page theory of operation and construction manual including complete chip documentation in an attrac- tive OSI binder. And Superboard is just the beginning of the OSI 400 system. You can expand its memory; interface to many l/Os including plotters, cas- settes, FSK, ASCII, Baudot and more; go video, includinggraph- ics; even add floppy disk. And bare boards are just $29 each, com- plete with in-depth manuals. But first things first. 400 me now! SPECIAL —$29 postpaid with this coupon only. Name Address . Slate City _ .Phone . Enclose check or money order or supply Bank Card information below. Card No. (include all digits) Interbank No. (Master Charge) Good thru . Ohio residents please add tax 081 Sign your name Ohio Scientific Instruments 11679 Hayden Street Hiram, Ohio 44234 Dept. B 75 Microprocessor Update: SC/MP Fills a Gap Robert Baker 15 Windsor Dr Atco NJ 08004 The new National Semiconductor micro- processor SC/MP, commonly called SCAMP, was designed to fill a gap between clumsy 4 bit microprocessors and the currently avail- able 8 bit microprocessors. According to the manufacturer, it is simple to use, requiring very few support chips for a basic system and is upgradable as the need arises. Only a single +10 to +14 V power supply is needed for the 40 pin dual inline processor. chip. A block diagram of the processor chip is shown in figure 1 . Microprocessor The processor provides simple interfacing with an 8 bit data bus that has TTL or CMOS compatible options. There are four serial data output ports and three serial data input ports along with two sense inputs for simple IO hardware. Three software con- trolled, user accessible output control flags may be used as needed for these direct control output applications. A separate bus access control provides Direct Memory Figure 1: Internal block diagram of the National Semiconductor SC/MP. In addition to a fairly typical 8 bit bus oriented proc- essor design, the SC/MP includes some features intended for ultra low cost system designs. These include three program- mable output flags, a serial input and output port, and two sense inputs, one of which can be used for interrupts. This is one of the reasons it is possible to make an inexpensive mini- mal system such as the $99 kit shown in photo I. 3 o CD < 4MSB MULTIPLEXED ADDRESS CRYSTAL OR TIMING CAPACITOR REQUEST ENABLE IN — ENABLE OUT- WAIT OSCILLATOR 9 TIMING GENERATOR ■o** -o*- RESET- 10 CONTROL H INSTRUCTION DECODE a CONTROL , GATING 8 FUNCTION CONTROL INSTRUCTION REGISTER 1 c OUTPUT ADDRESS PROGRAM COUNTER POINTER I BUS TRANSFER, SHIFT, ETC. ACCUMULATOR I 12-BIT + LU CE S.O. I < I- o ♦<^]FLAGO ♦< | FLAG I 3 BUFFER A 8- BIT DATA IO »" $1 .95 .Linear and Interface Circuits @ $3.95 .Semiconductor Memory Data @ $2.95 .Transistor and Diode Data Book <§> $4.95 .Power Semiconductor Handbook $3.95 .Understanding Solid State Electronics @ $2.95 .Optoelectronics Data Book @ $2.95 Please add 75 cents for postage and handling. Send to: Name Please allow six weeks for delivery. Address City State Zip biti Check enclosed Bill MC # Bill BA # .Exp. Date. .Exp. Date. PETERBOROUGH, NH 03458 Signature 80 IF YOU CAN'T FIND IT OFF THE SHELF TRY THE DATA DOMAIN We are proud to announce we are now dealers for the Digital Group. IMS Cromemco CSC Vector OSI Processor Tech The OataO OMAIN 111 S. College Av Bloomington, Ind. 47401 Phone (812) 334-3607 What's New? OEMs and Kit Makers Take Note: Bowmar Instrument Corporation, 8000 Bluffton Rd, Fort Wayne IN 46809, has introduced a new thermal printer, called the TP-3120, which can be integrated into products for the consumer markets. The printer is said to be highly reliable due to minimization of moving parts and evidence of a mean time between failure in excess of 3 million characters for the thermal print head and an overall operating life of more than 1 million lines of printing. The TP-3120 operates at a speed of 29.4 characters per second and prints up to 1.07 lines per second. The printer produces alpha- numeric outputs, has low power consump- tion and quiet operation, and thus should prove attractive in small systems. The design goal was a printer for use in microprocessor based terminals, medical electronics, point of sale cash register devices, test equipment and other instances where hard copy is a desirable feature if the cost is low enough." A 6800 Evaluation Board - Plus EROM Programmer and Tiny BASIC! AMI (American Microsystems Inc) has introduced a microprocessor prototyping board for hardware and software evaluation of the 6800 based microcomputer systems family in specific applications. The AMI 6800 Microprocessor Evaluation Board (EVK300) features a built-in program- mer for the S6834 EROM circuit. This feature gives the AMI board an additional capability not usually found in evaluation kits. Using the board, designers can become proficient with the 6800 processor, and system development can take place quickly and painlessly. The board can also serve as a general purpose computer for low volume systems by the utilization of up to 58 input/output lines and expansion up to 56 K bytes of programmable or read only memory. The single board computer measures 10.5 B1 inches (26.7 cm) by 12 inches (30.5 cm) and has two 86 pin edge connectors. The board can be used for evaluating incoming micro- circuits and for programming EROMs on a limited production basis. Communication with the computer is done through a Tele- type current loop interface. A high level interpretive computer lan- guage called AMI 6800 Tiny BASIC is furnished to EVK300 board users residing in the EROM at no extra charge, and proto- typing operating system program (PROTO), residing in the ROM, is also supplied with the board. The board is available in three package options: in kit form with the printed circuit board and a minimum of parts (EVK100 — $295); an expanded kit with 512 byte EROM (EVK200 - $595) and the expanded kit fully assembled and tested having 2 K bytes EROM with Tiny BASIC (EVK300 - $950). Contact American Microsystems Inc, 3800 Homestead Rd, Santa Clara CA 95051." More Tiny BASIC — Doctor Dobbs Is Really Moving Electronic Product Associates Inc, 1157 Vega St, San Diego CA 9211 0, have an- nounced that Tiny BASIC is now available for the Micro-68 computer development system. This BASIC is a 16 bit integer arithmetic subset of Dartmouth BASIC and includes: LET, IF ... THEN, INPUT, PRINT, GOTO, GOSUB, RETURN, END, REM, CLEAR, LIST, RUN, RND, and USR. The entire system will fit in only 2 K of memory and is available for a number of different configurations for input and out- put. Adding Tiny BASIC for $10 to the Micro-68 computer provides one of the lowest cost BASIC language systems avail- able today. The Micro-68 is a Motorola/ AMI/Hitachi 6800 prototype development system which sells complete with power supply, cabinet, hexadecimal keyboard and 6 digit LED priced at $430." Get Up and Running Quickly with This Self Contained Package Electronic Product Associates Inc, 1157 Vega St, San Diego CA 92110, (714)276-8911, has announced a complete microcomputer system for $1050. Called the Expanded-68, the computer is based on the Motorola 6800 microprocessor chip set. De- signed for engineering prototype develop- ment use, the Expanded-68 comes with 8 K of memory, power supply, 16 digit key- board, Teletype interface, hexadecimal LED display, expansion cabinet, application manual and programming manual. It should prove quite usable for the experimenter as well as the industrial designer. Also available for direct interfacing are: dual floppy disk drive, 40 column impact printer, 132 col- umn printer, cassette tape interface, TV interface, general purpose board, and full ASCII keyboard." The IMSAI Floppy Disk Subsystem IMS Associates, 14860 Wicks Blvd, San Leandro CA 94577, recently announced the availability of a floppy disk drive with an intelligent interface and controller. The system is specifically designed for use with the IMSAI 8080 computer. The floppy disk has a capacity of 243 K 82 bytes using the IBM 3740 format. The interface and controller contains its own processor and direct access memory which operate independently but under command of the main processor of the IMSAI 8080. This enables the main processor to perform other tasks while a disk operation is in process. Also, the user can change the program format of the disk by reprogram- ming the interface EROM chips. Up to four floppy disk drives can be controlled by one interface and controller. Each disk can be write protected under software control. The disk drive comes in a cabinet with a power supply and the capacity to accom- modate a second drive as shown in the photo. A rack mounted version is also available. All interconnection cables are included. The IMSAI floppy disk drive and interface controller are $1,649 assembled and $1,449 unassembled. An additional disk drive without a cabinet is $925. The inter- face controller alone is $799 assembled and $599 unassembled. Disk operating system software is avail- able on diskette for $40. Also, 12 K Ex- tended BASIC with disk access capability was announced in July of this year." A PROM Resident 8080 Assembler Microcomputer Technique Inc, 1120 Reston International Office Center Building, Reston VA 22091, has announced a resident assembler which runs in the Intel System Design Kit (SDK) microcomputer. The assembler requires 4 K bytes of memory and is available from stock for $450, delivered in four preprogrammed PROM chips. The MTI assembler operates in one, two or three passes (user selectable), produces relocatable or absolute object code, contains a relocatable loader, has rudimentary condi- tional assembly statements and is designed to work with serial media such as magnetic or paper tape." IMSAI announces a unique 4KRAM board for just $139. Nobody has a 4K RAM board that gives you so much for your money. It's fully compatible with the Altair 8800. Through the front panel or under software control, you can write protect or unprotect any IK group of RAM's. Also under software control you can check the status of any 4K RAM board in IK blocks to determine whether it's protected or not. The board has LED's that clearly show you the memory protect status of each IK block and which block is active. And there's a circuit provided that will let you prevent the loss of data in the memory if there's a power failure. This low power board has a guaranteed 450 ns cycle time- no wait cycle required. There's nothing like the IMSAI 4K RAM board around. Dealer inquiries invited. M IMS Associates, Inc. r. IMS Associates, Inc. Dept. B-9 1922 Republic Ave. San Leandro, CA 94577 (415) 483-2093 Order Your IMSAI 4K RAM Board For Only $139 Use BankAmericard, Master Charge, personal check or money order. "1 D Send . D Charge lo my credit card □ BAC No - D MC No._ . 4K RAM boards (oday Signature Name Address City/State/Zip- Lr 83 Chapter 3 BYTE Reprint MACHINE LANGUAGE PROGRAMMING FOR THE "800$" and similar microcomputers FUNDAMENTAL PROGRAMMING SKILLS Before one can effectively develop machine language programs for a computer, one must be thoroughly familiar with the instruction set for the machine. It is assumed for the re- mainder of this manual that the reader has studied the detailed information for the in- struction set of the 8008 CPU which was provided in the first chapter. The programmer should become intimately familiar with the mnemonics (pronounced kneemonics) for each type of instruction. Mnemonics are easily remembered symbolic representations of machine language instructions. They are far easier to work with than the actual numeric codes used by the computer when the pro- grammer is developing a program. While the programmer will develop programs and think in terms of the mnemonics, the programmer must eventually convert the mnemonics to the machine codes used by the computer. This, however, is almost purely a look-up procedure. In fact, as will be seen shortly, this task can actually be performed by the computer through the use of an ASSEMBLER program. Machine language programmers should also be familiar with manipulating numbers in binary and octal form. It is assumed that readers are familiar with representing numbers as binary values. However, there may be a few readers who are not used to the convention of representing binary numbers by their octal equivalents. The technique is quite simple. It consists merely of grouping binary digits into groups of three and representing their value as an octal number. The octal num- bering system only uses the digits through 7. This is exactly the range that a group of three binary digits can represent. The octal numbering system makes it a lot easier to manipulate binary numbers. For instance, most people find it considerably more con- venient to remember a three digit octal num- ber such as 104 than the binary equivalent 01000100. An octal number is easily ex- panded to a binary number by simply placing the octal value in binary form using three binary digits. The information in an eight bit binary re- gister can be readily converted to an octal number by grouping the bits into groups of three starting with the least significant bits. The two most significant bits in the register which form the last group will only be able to represent the octal numbers to 3. The dia- gram below illustrates the convention. EIGHT CELL REGISTER ************************************************* * *+** + *** *o *ito*o*oti*o*o* * *+** + *** ************************************************* Note in the diagram how an imaginary ad- ditional binary digit with a value of zero was assigned to the left of the most significant bit so that the octal convention for the two most significant bits could be maintained. A table illustrating the relationship between the binary and octal systems is provided for reference below. BINARY REPRESENTATIVE PATTERN OCTAL NO. 000 001 1 010 2 011 3 100 4 101 5 110 6 111 7 A person who desires to develop machine language programs for computers should become familiar with standard conventions used when dealing with closed registers (groups of binary cells of fixed length such as a memory word or CPU register). One very simple point to remember is that when a group of cells in a register is in the all ones condition: 11 111 111 and a count of 1 is added to the register, the register goes to the value: 00 000 000 Or, if a count of: 10 (binary) was added to a register that contained all ones, the new value in the register would be as shown: 11 111 111 + 00 000 010 00 000 001 10 4 CONVERTING AN 8 BIT REGISTER FROM BINARY TO OCTAL NUMBERS Similarly, going the opposite way, if one sub- tracts a number such as 100 (binary) from a 84 Reprinted from MACHINE LANGUAGE PROGRAMMING FOR THE "8008" (and similar microcomputers). Author: Nat Wadsworth Copyright 1975 Copyright 1976 - Revised Scelbi Computer Consulting Inc With the permission of the copyright owner. register that contains some lesser value, such as 010 (binary), the register would contain the result shown below: 00 000 010 00 000 100 11 111 110 It may be noted that if one uses all the bits in a fixed length register, one may represent mathematical values with an absolute magni- tude from zero to the quantity two to the Nth power, minus one (0 to (2**N - 1)) where N is the number of bits in the register. If all the bits in a register are used to represent the magnitude of a number, and it is also desired to represent the magnitude as being either positive or negative in sign, then some additional means must be available to record the sign of the magnitude. Generally, this would require using another register or memory location solely for the purpose of keeping track of the sign of a number. In many applications it is desirable to es- tablish a convention that will allow one to manipulate positive and negative numbers without having to use an additional register to maintain the sign of a number. One way this may be done is to simply assign the most significant bit in a register to be a sign in- dicator. The remaining bits represent the magnitude of the number regardless of whether it is positive or negative. When this is done, the magnitude range for an N cell re- gister becomes to (2**(N-1))-1 rather than to (2**N) - 1. The convention normally used is that if the most significant bit in the register is a one then the number represented by the remaining bits is negative in sign. If the MSB is zero, then the remaining bits specify the magnitude of a positive number. This convention allows computer programmers to manipulate mathematical quantities in a fashion that makes it easy for the computer to keep track of the sign of a number. Some examples of binary numbers in an eight bit register are shown next. BINARY REPRESENTATION OCTAL DECIMAL 00 00 1 000 1 + i 10 001 000 2 10 £ 1111 1 1 1 17 7 + 127 11111 111 377 - 127 00 000 00 1 00 1 + 1 10 000 001 201 1 gister (or word) as the magnitude, simply using the signed bit convention alone can still be a somewhat clumsy method to use in a computer. This is because of the method in which a computer mathematically adds the contents of two binary registers in the accum- ulator. Suppose, for example, that a computer was to add together positive and negative numbers that were stored in registers in the signed bit format. 00001000 (+ 8 decimal) PLUS 10001000 (- 8 decimal) EQUAL 10 010 000 (This is not 0!) The result of the operation illustrated would not be what the programmer intended! In order for the operation to be performed correctly, it is necessary to establish a method for processing the negative number called the two's complement convention. In the two's complement convention, a negative number is represented by complementing what the value for a positive number would be (comple- menting is the process of replacing bits thai are '0' with a '1,' and those that are '1' with a 0) and then adding the value one (1) to the complemented value. As an example, the number minus eight (-8) decimal would be derived from the number plus eight (+8) by the following operations. 00 001 000 11 110 111 00 000 001 11 111 000 (Original + 8) (Complemented) (now add +1) (2's complement form of - 8) Some examples of numbers expressed in two's complement notation with the signed bit convention are shown below. BINARY REPRESENTATION OCTAL DECIMAL 00 001 000 010 + 8 11111 000 370 8 01111 111 177 + 127 10 000 00 1 201 - 127 00 000 001 001 + 1 11111 111 377 1 00 000 000 000 + 10 000 000 200 - 128 tion of having the MSB in the register estab- lish the sign. If the MSB = 1, as in the above illustration, the number is assumed to be negative. Since the number is in the two's complement form, the computer can readily add a positive and a negative number and come up with a result that is readily inter- preted. Look! ADD 00 001 000 (+8 decimal) 11 111 000 (- 8 dec as 2's comp) 00 000 000 (Correct answer = 0) While the signed bit convention allows the sign of a number to be stored in the same re- Note that when using the two's comple- ment method, one may still use the conven- Another established convention in handling numbers with a computer is to assume that '0' is a positive value. Because of this convention, the magnitude of the largest negative number that can be represented in a fixed length re- gister is one more than that possible for a positive number. The various means of storing and mani- pulating the signs of numbers as just dis- cussed have advantages and drawbacks, and the method used depends on the specific application. However, for most user's, the two's complement signed bit convention will be the most convenient, most often used, method. The prospective machine language programmer should make sure that the con- vention is well understood. Another area that the machine language programmer must have a thorough knowledge of is the conversion of numbers between the decimal numbering system that most people work with on a daily basis, and the binary and octal numbering system utilized by computer technologists. Programmers working with microcomputers will generally find the octal numbering system most convenient. Because the conversion from octal to binary is simply a matter of grouping binary bits into groups of three as discussed at the start of this chapter, it is easier to remember octal codes than long strings of binary digits. However, most people are used to thinking in decimal terms, which the computer does not use at the machine language level. Thus, it is nec- essary for programmers to be able to convert back and forth between the various num- bering systems as programs are developed. The conversion process that is generally the most troublesome for people to learn is from decimal to binary, or decimal to octal (and vice-versa)! It is usually a bit easier for people to learn to convert from decimal to octal, and then use the simple octal to binary expansion technique, than to convert directly from decimal to binary. The easier method will be presented here. It is assumed that the reader is already familiar with going from octal to binary (and vice-versa). Only the conversions between decimal and octal (and the reverse) will be presented at this point. A decimal number may be converted to its octal equivalent by the following technique: Divide the decimal number by 8. Record the remainder (note that is the RE- MAINDER!!) as the least significant digit of the octal number being derived. Take the quotient just obtained and use it as the new dividend. Divide the new dividend by 8. The remainder from this operation becomes 85 the next significant digit of the octal number. The quotient is again used as the new divi- dend. The process is continued until the quo- tient becomes '0.' The number obtained from placing all the remainders (from each division) in increasing significant order (first remainder as the least significant digit, last remainder as the most significant digit) is the octal number equivalent of the original decimal. The process is illustrated below for clarity. The octal equivalent of 1234 decimal is: ORIGINAL NUMBER 1234 / 8 LAST QUOTIENT BECOMES NEW DIVIDEND 154 / 8 LAST QUOTIENT BECOMES NEW DIVIDEND 19 / 8 LAST QUOTIENT BECOMES NEW DIVIDEND 2 / 8 Thus the octal equivalent of 1234 decimal is: 154 19 2 3 . . - 2 . . . 2 3 2 2 The above method is quite easy and straightforward. Since a majority of the time the user will be interested in conversions of decimal numbers less than 255 (the maximum decimal number that can be expressed in an ORIGINAL NUMBER eight bit register) only a few divisions are necessary: The octal equivalent of 255 decimal is: QUOTIENT REMAINDER 255 / 8 = 31 7 LAST QUOTIENT BECOMES NEW DIVIDEND 31 LAST QUOTIENT BECOMES NEW DIVIDEND 3 Thus the octal equivalent of 255 is: / 8 = 3 7 7 For numbers less than 63 decimal (and such numbers are used frequently to set counters in loop routines) the above method reduces to one division with the remainder being the LSD and the quotient the MSD. This is a feat most programmers have little difficulty doing in their head! The octal equivalent of 63 decimal is: ORIGINAL NUMBER 63 / LAST QUOTIENT BECOMES NEW DIVIDEND 7 / Thus the octal equivalent of 63 is: 77 Going from octal to decimal is quite easy too. The process consists of simply multi- plying each octal digit by the number 8 raised to its positional (weighted) power, and then adding up the total of each product for all the octal digits: 2 3 2 2 Octal 2 X (8*0) = (2X1) = 2 . . .2 X (8*1) = (2X8) = 1 6 . . 3 X (8*2) = (3X64) = 19 2 2 X (8*3) (2X 512) = 102 4 Thus the decimal equivalend of 2322 Octal is : 12 3 4 Besides the basic mathematical skills in- volved with using octal and binary numbers, there are some practical bookkeeping consid- erations that machine language programmers must learn to deal with as they develop pro- MEMORY TOTAL WORDS WORDS THIS THIS INSTR. ROUTINE 2 2 2 4 2 6 1 7 1 8 1 9 1 10 grams. These bookkeeping matters have to do with memory usage and allocation. As the reader who has read chapter one in this manual knows, each type of instruction used in the 8008 CPU requires one, two, or three words of memory. As a general rule, simple register to register or register to memory commands require but one memory word. Immediate type commands require two memory locations (the instruction code followed immediately by the data or oper- and). Jump or call instructions require three words of memory storage. One word for the instruction code and two more words for the address of the location specified by the in- struction. The fact that different types of in- structions require different amounts of memory is important to the programmer. As programmers write a program it is often necessary for them to keep tabs on how many words of memory the actual operating por- tion of the program will require (in addition to controlling the areas in memory that will be used for data storage). One reason for maintaining a count of the number of memory words a program requires is simply to ensure that the program will fit into the available memory space. Often a program that is a little too long to be stored in an available amount of memory when first developed can be rewritten, after some thought, to fit in the available space. Generally, the trade-off between writing com- pact programs versus not-so-compact routines is simply the programmer's development time. Hastily constructed programs tend to require more memory storage area because the pro- grammer does not take the time to consider memory conserving instruction combinations. However, even if one is not concerned about conserving the amount of memory used by a particular program, one still often needs to know how much space a group of in- structions will consume in memory. This is so that one can tell where another program might be placed without interfering with a previous program. For these reasons, programmers often find it advantageous to develop the habit of writing down the number of memory words utilized by each instruction as they write the mnemonic sequences for a routine. Addition- ally, it is often desirable to maintain a column showing the total number of words required for storage of a routine. An example of a work sheet with this practice being followed is illustrated here: MNEMONICS COMMENTS LAI 000 Place 000 in accumulator LHI 001 Set Register H to 1 LLI 150 And Regis L to 150 ADM Add the contents of memory INL Locations 150 & 151 on page 1 ADM Adding second number to first RET End of subroutine 86 In the example the total number of words used in column was kept using decimal num- bers. Many programmers prefer to maintain this column using octal numbers because of the direct correlation between the total num- ber of words used, and the actual memory addresses used by the 8008. The example just presented can be used to introduce another consideration during pro- gram development. That is memory alloca- tion. One must distinguish between program storage areas in memory, and areas used to hold data that is operated on by the program. Note that the sample subroutine was designed to have the computer add the contents of memory locations 150 and 151 on page 01. Thus, those two locations must be reserved for data. One must ensure that those specific memory locations are not inadver- tantly used for some other purpose. In a typical program, one may have many lo- cations in memory assigned for holding or manipulating data. It is important that one maintain some sort of system of recording where one plans to store blocks of data and PG LOC MACHINE CODE LABELS MNEMONICS COMMENTS 01 000 ADD, Add no's@ 150 & 151 01 010 01 020 01 030 01 040 01 050 01 060 01 070 01 100 01 110 01 120 01 130 01 140 01 150 Number storage 01 151 Number storage 01 152 01 153 01 154 01 155 01 156 01 157 01 160 01 170 01 200 MEMORY USAGE MAP PROGRAM DEVELOPMENT WORK SHEET PG LOC MACHINE CODE LABELS MNEMONICS COMMENTS 01 000 006 000 ADD, LAI 000 Set ACC = 000 01 002 056 001 LHI 001 Set pntr PG = 1 01 004 066 150 LLI 150 Set pntr LOC = 150 01 006 207 ADM Add l'stno. to ACC 01 007 060 INL Adv pntr to 2'nd no. 01 010 207 ADM Add 2'nd no. to l'st 01 011 007 RET Exit subroutine where various operating routines will reside as a program is developed. This can be readily accomplished by setting up and using memory usage maps (often commonly referred to as core maps). An example of a memory usage map being started for the subroutine just dis- cussed is shown. The same type of form may also be used as a program development sheet as shown here . One may observe that the form provides for memory addresses, the actual octal values of the machine codes, labels and mnemonics used by the programmer, and additional in- formation. Memory usage maps are extremely valuable for keeping large programs organized as they are developed, or for displaying the locations of a variety of different programs that one might desire to have residing in memory at the same time. It is suggested that the person intending to do even a moderate amount of machine language programming make up a supply of such forms (using a ditto or mimeo- graph machine) to have on hand. 87 There are some important factors about machine language programming that should be pointed out as they have considerable im- pact on the total efficiency and speed at which one can develop such programs and get them operating correctly. The factors relate to one simple fact. People developing machine language programs (especially beginners) are very prone to making programming mistakes! Regardless of how carefully one proceeds, it always seems that any fair sized program needs to be revised before a properly operating program is achieved. The impact that changes in a program have on the de- velopment (or redevelopment) effort vary according to where in the program such changes must be made. The reason for the seriousness of the problem is because program changes generally result in the addresses of the instructions in memory being altered. Remember, if an instruction is added, or de- leted, then all the remaining instructions in the routine being altered must be moved to different locations! This can have multiplying effects if the instructions that are moved are referred to by other routines (such as call and jump commands) because then the addresses referred to by those types of commands must be altered too! To illustrate the situation, a change will be made to the sample program presented several pages ago. Suppose it was decided that the subroutine should place the result of the addition calculation in a word in memory before exiting the subroutine, instead of simply having the result in the ac- cumulator. The original program, for example, could have been residing in the locations shown on the program development work sheet on the previous page. Changing the program would result in it occupying the following memory locations: MEMORY PAGE LOC CONTENTS MNEMONICS COMMENTS 01 000 006 LAI 000 Place 000 in accumulator 01 001 000 01 002 056 LHI 001 Set Reg H to 1 01 003 001 01 004 066 LLI 150 Set Reg L to 150 01 005 150 01 006 207 ADM Add contents of memory 01 007 060 INL Locations 150 & 151 01 010 207 ADM Add 2nd to 1st 01 011 066 LLI 160 Set Reg L to 160 **01 012 160 ** 01 013 370 LMA Save answer @ 160 ** 01 014 007 RET End of subroutine The ** locations denote the additional memory locations required by the modified subroutine. If the programmer had already developed a routine that resided in locations 012, 013, or 014, the change would require that it be moved ! If one was using a program development work sheet, one would have had to erase the original RET instruction at the end of the routine and then written in the two new commands, and added the RET instruction at the end. The effects would not be too de- vestating since the change was inserted at the end of the subroutine. But, suppose a similar change was necessary at the start of a sub- routine that had 50 instructions in it? The programmer would have to do a lot of erasing! The effects of changes in program source listings was recognized early as a problem in developing programs. Because of this" people developed programs called EDITORS that would enable the computer to assist people in the task of creating and manipulating source listings for programs. An EDITOR is a program that will allow a person to use a com- puter as a text buffer. Source listings may be entered from a keyboard or other input device and stored in the computer's memory, information that is placed in the text buffer is kept in an organized fashion, usually by lines of text. An Editor program generally has a variety of commands available to the operator to allow the information stored in the text buffer to be manipulated. For instance, lines of information in the text buffer may be added, deleted, moved about or inserted before other lines, and so forth. Naturally, the information in the buffer can be displayed to the operator on an output device such as a cathode ray tube (CRT) or electromechan- ical printing mechanism. Using this type of program, a programmer can rapidly create a source listing and modify it as necessary. When a permanent copy is desired, the contents of the text buffer may be punched on paper tape or written on a magnetic tape cassette. It turns out that the copy placed on paper tape or a cassette can often be further processed by another program to be discussed shortly which is termed an MEMORY PAGE LOC CONTENTS MNEMONICS 00 000 026 OVER, LCI 100 00 001 100 00 002 106 CAL NEWONE 00 003 013 00 004 000 00 005 106 CAL LOAD 00 006 023 00 007 000 00 010 104 JMP OVER 00 011 000 00 012 000 00 013 056 NEWONE, LHI 000 00 014 000 00 015 066 LLI 200 00 016 200 00 017 317 LBM 00 020 010 INB 00 021 371 LMB 00 022 007 RET ASSEMBLER program. However, an important reason for making a copy of the text buffer on paper tape or magnetic cassette tape is because if it is ever necessary to make changes to the source listing, then the old listing can be quickly reloaded back into the computer. Changes may then be rapidly made using the Editor program, and a new clean listing obtained in a fraction of the time that might be required to erase and rewrite a large number of lines using pencil and paper. Relatively small programs can be developed using manual methods. That is, by writing the source listings with pencil and paper. But, anyone that is planning on doing extensive program development work should obtain an Editor program in order to substantually increase their overall program development efficiency. Besides, an Editor program can be put to a lot of good uses besides just making up source listings! Such as enabling one to edit correspondence or prepare written documents that are nice and neat in a fraction of the time required by conventional methods. Changes in source listings naturally result in changes to the machine codes (which the mnemonics simply symbolize). Even more important, the addresses associated with instructions often must be changed due to additions or deletions of words of machine code. For instance, in the example routine being used in this section, memory address PAGE 01 LOCATION 011 originally contained the code for a RET (RETURN) in- struction which is 007. When the subroutine was changed by adding several more instructions (so the answer could be stored in a memory location), the RET instruction was shifted down to the address PAGE 01 LOCATION 014. The address where it formerly resided was changed to hold the code for the first part of the LLI 160 instruction which is 066. Had changes been made earlier in the routine, then many more memory locations would need to be assigned different machine codes. However, the changes caused by adding on to the sample program previously discussed are not as far reaching as the one presented on the follow- ing page. There the changes result in the addresses of subroutines referred to by other routines being changed, so that it is then necessary to go back and modify the machine codes in all of the routines that refer to the subroutine that was changed ! COMMENTS Load reg C with 100 Call a new subroutine And then another Jump back & repeat Load reg H with zeroes And L with 200 Fetch mem contents to B Increment the value in B Place B back into memory End of subroutine 88 MEMORY AGE LOC CONTENTS MNEMONICS COMMENTS 00 023 056 LOAD, LHI 003 Set H to PG 03 00 024 003 00 025 361 LLB Place register B into L 00 026 370 LMA Place ACC into memory 00 027 021 DCC Decrement value in reg C 00 030 013 RFZ Return if C is not zero 00 031 000 HLT Halt when C = zero Suppose it was decided to insert a single word instruction right after the LCI 100 com- mand in the above program. The new program would appear as shown next. MEMORY AGE LOC CONTENTS MNEMONICS COMMENTS 00 000 026 OVER, LCI 100 Load reg C with 100 00 001 100 00 002 250 XRA Clear the accumulator 00 003 106 CAL NEWONE Call a new subroutine 00 004 ** 014 00 005 000 00 006 106 CAL LOAD And then another 00 007 ** 024 00 010 000 00 011 104 JMP OVER Jump back and repeat 00 012 000 00 013 000 00 014 056 NEWONE , LHI 000 Load Reg H with zeroes 00 015 000 00 016 066 LLI 200 And L with 200 00 017 200 00 020 317 LBM Fetch mem contents to B 00 021 010 INB Increment the value in B 00 022 371 LMB Place B back into memory 00 023 007 RET Exit subroutine 00 024 056 LOAD, LHI 003 Set H to PAGE 03 00 025 003 00 026 361 LLB Place reg B into L 00 027 370 LMA Place ACC into memory 00 030 021 DCC Decrement value in reg C 00 031 013 RFZ Return if C is not zero 00 032 000 HLT Halt when C is zero Note in the illustration how not only the addresses of all the instructions beyond location 002 (denoted by the *) change, but even more important, that parts of the in- structions themselves (the address portion of the CAL instructions, denoted by the **) must now be altered. The essential point being made here is that if the starting address of a routine or subroutine that is referred to by any other part of the program is changed, then each and every reference to that routine must be located and the address portion corrected! This can be an extremely formi- dable, time consuming, tedious, and down right frustrating task if all the references must be found and corrected by manual means in a large program! Early computer technologists soon became disgusted with making such program correc- tions by hand methods after learning that it was almost impossible to develop large pro- grams without making a few errors. They went to work on finding a method to ease the task of making such corrections and came up with a type of program called an ASSEM- BLER that could utilize the computer it- self to perform such exacting tasks. ASSEMBLER programs are types of programs that are able to process source listings when they have been written in mnemonic (sym- bolic) form and translate them into the OBJECT code (actual machine language code) that is utilized directly by the computer. An ASSEMBLER also keeps track of assigning the proper addresses to references to rout- ines and subroutines. This is accomplished through a process initiated by the program- mer assigning LABELS to routines in the source listing. One may now see that the combination of an Editor and an Assembler program can greatly ease the task of de- veloping machine language programs over that of the purely manual method. The use of such programs is almost mandatory when programs become large because the manual method becomes highly unwieldy. A primary reason that an Editor and Assembler are so useful is because if a mistake is made in the program, one can use the relatively quick method of utilizing the Editor program to revise the source listing. Then, one may use the Assembler program to reprocess the corrected source listing and produce a new version of the machine code assigned to new addresses if appropriate. For quite small programs, say less than 100 instructions, the use of Editor and Assembler programs are not mandatory. In fact, even if one uses these aids for small programs, one should know how to manually convert mnemonic listings to object code. This is because it may occasionally be de- sirable to make minor program changes (patches) without having to go through the process of using an Editor and Assem- bler. This is particularly true when one is DEBUGGING large programs and wants to ascertain whether a minor correction will correct a problem. The process of convert- ing from a mnemonic listing to actual mach- ine code is not difficult in concept. Many readers will have discerned the process from the examples already provided. However, for any who are in doubt, the process will be explained for the sake of clarity. Suppose a person desired to produce a small program that would set the contents of all the words in PAGE 01 of memory to 000. The programmer would first develop the algorithm and write it down as a mne- monic (source) listing. Such an algorithm might appear as follows. MNEMONIC LHI 001 LLI 000 AGAIN, LMI 000 INL JFZ AGAIN HLT COMMENTS Set the high address register to PAGE 01. Set the low address register to the first location on the page assigned by reg. H. Load the contents of the memory location specified by registers H & L to 000. Advance register L to the next memory location (but do riot change the page). If the value of register L is not 000 after it has been incremented then JUMP back to the part of the program denoted by the label AGAIN and repeat the process. If the value of register L is 000, then have the computer stop as the program is done! To convert the source listing to machine (object) code the programmer must first decide where the program is to reside in memory. In this particular case it would certainly not be wise to place the program anywhere on PAGE 01 as the program would self-destruct! The program could safely be placed anywhere else. For the sake of demon- stration it will be assumed that it is to reside on PAGE 02 starting at LOCATION 100. To convert the source listing to machine code the programmer would simply make a list of the addresses to be occupied by the program. Then the programmer would simply look up the machine code corresponding to the mnemonic for each instruction and place this number next to the address in which it will reside. (The machine code for each mnemonic used by the '8008' CPU is provided in Chapter ONE of this manual.) ORIGINAL MEMORY MEMORY MNEMONIC ADDRESS CONTENTS LHI 001 02 100 056 02 101 001 LLI 000 02 102 066 02 103 000 AGAIN, LMI 000 02 104 076 02 105 000 INL 02 106 060 JFZ AGAIN 02 107 110 02 110 104 02 111 002 HLT 02 112 377 Once the program has been put in machine language form the actual machine code may be placed in the assigned locations in mem- ory. The programmer may then proceed to verify the algorithm's validity. For small programs such as the example just illustrated the machine code can simply be loaded into the correct memory locations using manual methods typically provided on microcom- puter systems. Such small programs can then be easily checked out by stepping through the program one instruction at a time. If the program is relatively large then a special loader program which is typically provided with an ASSEMBLER program could be used to load in the machine code. Checking out and DEBUGGING large programs can sometimes be difficult if a few simple rules are not followed. A good rule of thumb is to first test out each sub- routine independently. One may choose to STEP through a subroutine, or else to place HALT instructions at the end of each sub- Since some instructions are location dependent in that they require the actual address of referenced routines, it is often necessary to assign the machine code in two processes. The first process consist of assigning the machine codes to specific memory addresses wherever possible. When the machine code requires an address that has not yet been determined, the memory location is left blank. The second process consists of going back and filling in any blanks once the addresses of referenced routines have been determined. In the example being used for illustration, only one process is required because the address specified by the label AGAIN is defined before the label (address) is referenced by the JFZ instruction. The sample program when converted to machine language code would appear as shown next. COMMENTS Machine code for LHI mnemonic Immediate part of LHI mnemonic Machine code for LLI mnemonic Immediate part of LLI mnemonic Machine code for LMI mnemonic Note that the label AGAIN now defines an address of LOCATION 104 on PAGE 02 Immediate part of LMI mnemonic Increment low address here Machine code for JFZ mnemonic Low address portion of the CONDI- TIONAL JUMP instruction as defined by label AGAIN above PAGE address portion of the CONDITIONAL JUMP instruction defined by label AGAIN Alternately, the code 000 or 001 could have been used here as the machine code for a HALT command routine. Then one may verify that data was manipulated properly by a particular sub- routine before going on to the next section in a program. The use of strategically located HALT instructions in a program initially being tried out is an important technique for the programmer to remember. When a HALT is encountered the user may check the contents of memory locations and examine the contents of CPU registers to determine if they contain the proper values at that point in the program. (Using the manual operator controls and indicator lamps typi- cally provided with microcomputer develop- ment systems.) If all is well at a check point then the programmer may replace the HALT instruction with the actual in- struction for that point. One may then continue checking the operation of the program after making certain that any registers that were altered by the examination procedure (typically registers H and L in an '8008' system) have been reset to the desired values if they will effect operation of the program as it continues! It is often helpful to use a utility pro- gram known as a MEMORY DUMP pro- gram to check the contents of memory locations when testing a new program. A memory dump program is a small utility program that will allow the contents of areas in memory to be displayed on an output device. Naturally, the memory dump program must reside in an area of memory outside that being used by the program being checked. By using this type of pro- gram the operator may readily verify the contents of memory locations before and after specific operations occur to see if their contents are as expected. A memory dump program is also a valuable aid in determining whether a program has been properly loaded or that a portion of a program is still intact after a program under test has gone errant. One will find that having flow charts and memory maps at hand during the DEBUGGING process is also very help- ful. They serve as a refresher on where routines are supposed to be in memory and what the routines are supposed to be doing. If minor corrections are necessary or desired, then one may often make program corrections, or PATCHES as they are com- monly referred to by software people, to see if the corrections believed appropriate will work as planned. An easy way to make a PATCH to a program is to replace a CALL or JUMP instruction with a CALL to a new subroutine that contains the desired cor- rections (plus the original CALL or JUMP instruction if necessary). If a CALL or JUMP instruction is not available in the vicinity of the area where a correction must be made then one can replace three words of instructions with a CALL patch provided that one is very careful not to split up a multi-word instruction. If this cannot be avoided, then the remaining portion of a split-up multi-word instruction must be replaced with a NO-OPERATION instruc- tion such as a LAA command (in an '8008' system). One must also make certain that the instructions displaced by the inserted CALL instruction are placed in the patch- ing subroutine (provided that they are not being removed purposely). An example of several patches being made to the small example program previously discussed will be illustrated next. Suppose, in the example just presented, that the operator decided not to clear (set to 000) all the words in PAGE 01 of mem- ory, but rather to only clear the locations 000 to 177 (octal) on the page. The pro- gram could be modified by replacing the JFZ AGAIN instruction which started at LOCATION 107 on PAGE 02 with the command CAL 000 003 (CALL the sub- routine starting at LOCATION 000 on PAGE 03 which will be the PATCH). Now at LOCATION 000 on PAGE 03 one could put: 90 MNEMONIC LAI 200 MEMORY ADDRESS MEMORY CONTENTS 03 000 006 03 001 200 CPL 03 002 276 JFZ AGAIN 03 003 110 03 004 104 03 005 002 RET 03 006 007 COMMENTS Put value 200 into the ACC Note value of 200 used because contents of register L has been incremented Compare contents of the ACC with the contents of register L If accumulator and L do not match then continue with the original program End of PATCH subroutine Suppose instead of filling every word on PAGE 01 with zeroes the programmer de- cided to fill every other other word? A patch could be made by replacing the LMI 000 MEMORY MEMORY MNEMONIC ADDRESS CONTENTS LMI 000 03 000 076 03 001 000 INL 03 002 060 INL 03 003 060 RET 03 004 007 command at LOCATION 106 on PAGE 02 and again inserting a CAL 000 003 command to a patch subroutine that might appear as illustrated below. COMMENTS Keep the LMI instruction as part of the PATCH Keep original increment L And add another increment L to skip every other word Exit from PATCH subroutine Finally, to illustrate a patch that splits a multi-word command, consider a hypo- thetical case where the programmer decided that prior to doing the clearing routine, it would be important to save the contents of register H before setting it to PAGE 01. If a three word CALL command is placed starting at LOCATION 100 on PAGE 02 in the original routine to serve as a PATCH, it may be observed that the second half of the LLI 000 instruction would cause a problem when the program returned from the patch. MEMORY MEMORY MNEMONIC ADDRESS CONTENTS LEH 03 000 345 LHI 001 03 001 056 03 002 001 LLI 000 03 003 066 03 004 000 RET 03 005 007 (The value of 000 at LOCATION 103 on PAGE 02 in the example program would be interpreted as a HLT command by the com- puter when it returned from the patch sub- routine.) In order to avoid this problem the programmer could place a LAA (effectively a NO-OPERATION command) at LOCATION 103 on PAGE 02 after placing the patch command CAL 000 003 instruction beginning at LOCATION 100 on PAGE 02. The actual patch subroutine might appear as shown below. COMMENTS Save register H in register E Now set register H to point to PAGE 01 And set the low address pointer to LOCATION 000 End of PATCH subroutine In the balance of this manual numerous techniques for developing machine language programs will be presented and discussed. Many of the examples used will be presented as subroutines that the reader may use when developing customized programs. It is im- portant for the new programmer to learn to think of programs in terms of routines or subroutines and then learn to combine subroutines into larger programs. This prac- tice makes it easier for the programmer to initially develop programs. It is generally much easier to create small algorithms and then combine them, in the form of sub- routines, into larger programs. Remember, subroutines are sequences of instructions that can be CALLED by other parts of a program. They are terminated by RETURN or CONDITIONAL RETURN commands. It is also wise when developing programs to leave some room in memory between sub- routines so that patches can be inserted or routines lengthened without having to rearrange the contents of a large amount of memory. Finally, while speaking of sub- routines, it will be pointed out that the user would be wise to keep a note book of subroutines that the individual develops in order to build up a reference library of pertinent routines. It takes time to think up and check out algorithms. It is very easy to forget just how one had solved a par- ticular problem six months after one init- ially accomplished the task. Save your accrued efforts. The more routines you have to utilize, the more valuable your machine becomes. The power of the machine is all determined by WHAT YOU PUT IN ITS MEMORY! 1. First, the programmer should clearly define and write down on paper exactly what the program is to accomplish. 2. Next, flow charts to aid in the complex task of writing the mnemonic (source) listings are prepared. They should be as detailed as necessary for the program- mer's level of experience and ability. 3. Memory maps should be used to distribute and keep track of program storage areas and data manipulating regions in available memory. 4. Using the flow charts and memory maps as guides, the actual source listings of the algorithms are written using the symbolic representations of the instructions. An Editor program is frequently used to good advantage at this point. 5. The mnemonic source listings are converted into the actual machine language numerical codes assigned to specific addresses in memory. An Assembler pro- gram makes this task quite easy and should be used for large programs. 6. The prepared machine code is loaded into the appropriate addresses in the computer's memory and operation of the program is verified. Often the initial check out is done using the STEP mode of operation, or by exercising indivi- dual subroutines. The judicial use of inserted HALT instructions at key loca- tions will often be of value during the initial testing phase. 7. If the program is not performing as intended then problem areas must be iso- lated. Program PATCHES may be utilized to make minor corrections. If serious problems are found it may be necessary to return to step no. 3, or step no. 1! i 91 Classified Ads for Individuals and Clubs Readers who have equip- ment, software or other items to buy, sell or swap should send in a clearly typed notice to that effect. To be consider- ed for publication, an adver- tisement should be clearly non-commercial, typed double spaced on plain white paper, and include complete name and address information. These notices are free of charge and will be printed one time only on a space available basis. Insertions should be lim- ited to 100 words or less. Notices can be accepted from individuals or bona fide com- puter users clubs only. We can engage in no correspondence on these and your confirma- tion of placement is appear- ance in an issue of BYTE.* FOR SALE: DEC tape controller model 552 for TU-55 tape drive, two units available, best offer, Edmund Wong 660-44th Av, San Francisco CA 94121 (415) 221-3492. FOR SALE: $500 takes all, or: Ml L Mod 8 - CPU, TTY board, buffer, 2 K PROM board, 2 K RAM board, input, output, 4 K ROM/PROM/RAM board, 2 K Monitor-8 ROM, etc, socketed ICs, $300; Digital Group cassette interface, $20; Creed TTY- $100; TVT-1 & KBD-1 $120. $500 takes all the above. Altair 8800 new kit, unassembled & untouched $400. Richard F Schultz, 611 N Dex- ter, Lansing Ml 48910, 1517) 393-9438. FOR SALE: Intel CPU system. Asking $1,200 or ? Worth over $5,000. CPU Intel 8008 8 bit parallel 8 K RAM memory 2102 type, expandable in 16 K units, 2K PROM memory 1702 type SYSCOR dual digital tape cassettes, IBM selectric printer/ keyboard model 735, RS232 ASCII 1200 baud modem with cables, 4 heavy duty power supplies. The above rack mounted in or mounted on 30" X 48" X 29" work station table. Software and BASIC available. Call Dave Trimble at (305) 273-9783 after 5 PM or write POB 20401, Orlando FL 32814. FOR SALE: Digital cassette recorder made by National Multiplex Corp. Same one advertised in BYTE for $149.95. Like new, less than 10 hours use. First cashier's check or money order for $100 takes it postpaid in original carton. Charles Packer, 801 Pocahontas PI, Hampton VA 23661, (804) 722-1364. FOR SALE: 5262 2 K RAMS - $2 each, misc core stacks — $1 /Kbyte, PC card edge connectors, 0.156 contact spacing: 1 side X 22 - 1 5BIAS ADRESS ENTERED (BIAS I CHECK FOR CR 10THERS N.G. I SAVE BIAS I KILL I TTYO ECHO J TAPE J ON IQET BIAS J AND RESTORE IQET INPUT J CHUCK FOR RCD MARK I CLEAR CHECKSUM J GET LENGTH I ZERO ALL DONE I SAVE LENGTH J GET HIGH ADDRESS ) AND SAVE I GET LOU ADDRESS I FITCH MSBYTE JBC HAS ADDRESS J SAVE VECT I TO HL I SAVE BLOCK ADDRESS I IN CASI OF ERROR I RESTORE IADD TO BIAS J GET TYPE J GET DATA I AND STORE IT ( CONTINUE J GET CHECKSUM i CONTINUE JCHEKSUM ERROR i Msa I ADDRESS OF THIS BLOCK I FOR REFERENCE IAND EXIT J GET MSB OF XEQAD I TAPE RDR I OFF I MOW IF NO XEQAD ;ao TO ROUTINE I GET TWO CHARS 0557 F5 0558 DB01 055A E604 055C C25805 055F Fl 560 F5 0561 2F 562 D300 0564 Fl 0565 C9 566 DB01 568 E601 56A C2660 5 56D DBOO 056F 2F 0570 C9 LDA CALL TYPEI PUSH IN ANI JNZ POP PUSH CMA OUT POP RET JTH1S ROUTINE CHAR CHARACTER IN TYPE J TYPE IT JRETURN HERE PSW (SAVE CONTENTS OF 'A' 1 J INPUT TTY STATUS 4 J TEST FOR BUSY TYPE*1 J IF BUSY. KEEP TRYING PSW JRETRIEVE THE DATA PSW (AND SAVE IT AGAIN 1 PREPARE THE DATA ; OUTPUT IT PSW (RESTORE 'A' WORKS IN MY SYSTEM (BUT MAY NOT WORK IN YOURS 1R0UTINE TO GET A CHARACTER FROM THE TTY ICALLING SEQUENCE ; CALL GETCH r GET CHARACTER (RETURN HERE WITH CHARACTER I IN 'A' ■ALL REGISTERS PRESERVED EXCEPT 'A' WHICH (CONTAINS THE INPUT CHARACTER IN ANI JNZ IN CMA RET 1 ; INPUT TTY STATUS 1 J TEST FOR READY GETCH JKEEP TRYING IF NOT READY I6ET THE CHARACTER J PROCESS IT J THIS ROUTINE WORKS IN MY SYSTEM BUT MAY NOT 1W0RK IN YOURS ENDROM EQU t (BOUNDARY MARKER SYSTEM RAM AREA DEFINITIONS J USER RESTART VECTORS 1 - 7 ocoo RST1 I DS 2 0C02 RST2I DS 2 0C04 RST3I DS 2 0C06 RST41 DS 2 0C06 RST5I DS 2 OCOA RST6I DS 2 OCOC RST7I DS 2 MONITOR REGISTER SAVE AREA I SYSTEM MESSAGES 04EA 0D0A0A41 HOI 04EE 4D533830 04F2 20 56322E 04F6 300AFF 04F9 0D0A7F2A Mil 04FD 2A20FF 500 20495320 M2I 0504 554E4445 0506 46494E45 50C 44FF 050E 203F3FFF M31 0512 140D0A7F M4i 0516 4D454D20 051A 57524954 0S1E 45204552 522 524F5220 0526 41 5420 FF 52A 20 5041 55 MSI 052E 534520FF 0532 14204348 M6i 0536 4B534D20 53A 4552 522C 053E 2042 4C4F 542 434B20FF 546 20204F4B M7I 54A 3F20FF 54D 2041424F MB! 0551 52 544544 0555 E1FF DB CR.LF.LF. "AM580 V8.0".LF.-I DB CR.LF.RBO. ••• ".-1 DB ' IS UNDEFINED'.-l DB ' 77 '.-1 DB TOFF. CR.LF.RBO. 'MEM WRITE ERROR AT *.-l DB ' PAUSE '.-1 DB TOFF.' CHKSM ERR. BLOCK '*-! DB ' 0K7 ',-1 DB ' ABORTEDI '. -1 ISYSTEM I/O ROUTINES IUSER IS TO PATCH HIS OWN TELETYPE (ROUTINES HERE 1R0UTINE TO TYPE A CHARACTER (CALLING SEQUENCE SVPCl OCOE SVPCLI DS 1 (SAVED PC LOW OCOF SVPCHI SVSPI DS 1 (SAVED PC HIGH 0C10 SVSPLI DS 1 ( SAVED sp LOW 0C11 SVSPHI SVHLl DS 1 (SAVED SP HIGH 0CI2 SVLI DS 1 (5AVED L 0C13 SVHI DS 1 (SAVED H 0C14 SVEI DS 1 (SAVED E 0C15 SVDl DS 1 (SAVED D 0C16 SVCI DS 1 (SAVED C 0C17 SVBI D5 1 (SAVED B 0C18 SVFI DS 1 (SAVED PSB. FLI 0C19 SVAI DS 1 (SAVED ACC TMPAI OCID GOGOl DS 3 0C20 XF.QADl DS 2 0C22 BLKAD! DS 2 0C24 00 NOP 0000 END (CHIN ECHO FLAG. OO-ECHO (-0 - NO ECHO (EXAMINE/MODIFY ADDRESS (TEMP STORAGE LOCATIONS ( 'JUMP' STORAGE ('X 1 EXECUTION ADDRESS I 'L' BLOCK ADDRESS (PROGRAM BOUNDARY MARKER 120 /A COMPLETE I 1KRAM I SYSTEM INTRODUCING THE VERASF8 COMPUTER 16" 14-3/4" With CPU card, buffered mother card, power supply and cabinet. The VERAS System is developed around the popular F-8 Series of chips which in our estimation is the finest and most versatile Micro processor now available. The VERAS System can be made into a 17K pro- cessor by merely adding four of our optional memo- ry boards. OUR 4K STATIC RAM BOARD FEATURES: (OPTIONAL) • Outputs buffered. • On board decoding for any four of 64 pages. • Address and data lines are fully buffered. • 32 2102-1 static RAM's, 500 ns. or less, requiring no refreshing. • No onboard regulators to cause heat problems. (Chassis mounted) • 4K memory boards with connector, buyers and static RAM's are available in kit form for $149.00 The fully buffered mother board will accept (4) 4K RAM boards for a total of 16K byliss of memory. Individual power ter- minals for each 4K RAM board are provided. Memory expansion beyond 16K bytes can be accomplished by the addition of more mother boards. Extra buffered mother boards with connectoi are available in kit form for S45.00 Our modular power supply is designed around a high frequency torroid transformer which affords a large saving In size and weight, and keeps filtering to a minimum. It is rated at +5V at 10 amps and -5V and ±12V at 1 amp. This power supply will drive our CPU, four memory boards and some peripherals. POWER SUPPLY KIT S124 00 All boards are high quality G-10, double sided, solder plated with gold plated edge Connector, PACKAGING FEATURES ARE: • All Complete modular plug-in construction. • B) Specifically designed rugged aluminum card rack with piovisions for voltage regulators (TO-?20 supplied) to keep heat off the boards. • CI Designed for convection or optional forced cooling. • D) All I/O ports brought out to the rear panel connectors for easy accessibility. • El Auxiliary DC power available at the rear panel to power peripherals. Veras Systems is currently developing the following: UV PROM board, DMI and DMA board, Cassette, modern, video board and more. All these boards will have innovative de- sign, something you will come to expect from VERAS SYSTEMS. SPECIAL INTRODUCTORY PRICE FOR THE VERAS F8 Computer kit is S429.00 or S679.00 assembled. The price will be S459.00 after Sept. 15, 1976. The kit includes everything you need to build the VERAS F-8 Computer as described. All boards, connectors, switches, discrete components, power supply and cabinet are supplied. Programming manual, data book and simplified support documentation supplied. 8K Assembler and Editor (paper tape! available on request with minimum order of 8K RAM. Computer dealers and hobbyist club inquiries are invited. ^^ Expected delivery time 30 days or less. THE SYSTEM DESIGNED WITH THE USER IN MIND THE CPU BOARD FEATURES: Two I/O ports on the CPU and ROM chip make 32 bidirectional TTL lines. The Fairbug' programmed storage unit provides the programmer with all I/O subroutines, allows the programmer to alter or display memory, and register its contents via teletype. Programmable internal timer is built into the ROM chip. Built in clock generator and power on reset are built into the CPU chip. There is a local interrupt with automatic address vector. It is expandable to 65K bytes of memory. 20 mil loop and/or RS232 interface included. 1K of on board 2102 RAM. Serial interface built into PSU chip, I The More Flexible and Expandible Computer at a Comparative Price. VERAS SYSTEMS > I Warranty: 90 days on parts and labor for assembled units. 90 days on parts for kits. Prices, specifications and delivery subject to change without notice. 'Fairbug is a registered trademark of Fairchild Corp. VERAS SYSTEMS A Div. of Solid State Sales, Inc. Box 74B, Somerville, MA 02143 (6171 547-1461 [~l Enclosed is check for S 1 or G Master Charge # □ vERAS F-8 Computer Kit DAssembled D4K Ram Board Quantity □ Power Supply Kit City, State. INTEL 8080 CPU S29.50 2518-HEX 32 BIT SR .... SG.00 2102-1 1024 8T RAM S 2.60 5280-4K DYNAMIC HAM S12.50 5202A UV PROM S12.50 MM5203UVPROM SI 2.50 1702AUVPROM S12.50 5204-4K PROM $24.95 MINIATURE MULTI-TURN TRIM POTS 100, 500, 5K, 10K, 100K 200K S.75 eac^i 3/S2.0G MULTI-TURN TRIM POTS Sim. lar to Bourns 3010 siyle3/l6"x5/8"xl-1/4"; 50. 100, IK, 10K, 50K ohms $1.50e;i .■■■-- 3/S4.00 LIGHT ACTIVATED SCR's TO-18. 200V 1A S 1.75 TRANSISTOR SPECIALS 2N3585 NPN Si TO 66 S .95 2N3772 NPN Si TO-3 S 1 60 2N4908 PNP Si TO 3 . .... S 1 .00 2N6055 NPN Si TO 3 Darlington . S 1 30 2N5086 PNP Si TO-92 4/S 1.00 2N4898 PNP TO-66 S .60 2N404 PNP GE TO 5 5/S 1 .00 2N3919 NPN Si TO-3 RF S 1 .50 MPSA 13 NPN Si TO-92 3/S 1 .00 2N3767 NPN Si TO-66 S .70 2N2222 NPN Si TO-18 5/S 1 .00 2N3055 NPN S. TO-3 S .80 2N3904 NPN Si TO-92 5/S 1 .00 2N3906 PNP Si TO-92 5/S 1 .00 2N5296 NPN Si TO-220 S .50 2N6109 PNP S. TO 220 S .55 2N3866 NPN S. TO-5 RF S .75 2N3638 PNP Si TO-5 5/S 1.00 2N651 7 NPN TO-92 Si 3/S 1 .00 C/MOS (DIODE CLAMPED) 74C02- .25 4016- 50 4035-113 74C10- .25 401/ 1-00 4042- 90 4001- 19 4018- 1 20 4047-1.80 4002- 22 4019- 5u 4049- 50 4006- 120 4022 100 4050 60 4007- .22 4023- 25 4055 1 75 4009- 47 4024- -80 4066- .90 4010- .47 4025 22 4071 - .40 4011- .22 4027- 48 4077 35 4012- 22 4028-100 4081 35 4013- 30 4029-100 4076-120 4015- 1.10 4030- 45 LED READOUTS FND 500-.5" C.C SI. 75 HP7740-.3" C.C St .40 MAN-7-.3" C.A SI .25 NS 33-3 dig. array 51 .35 Send 25£ lui oui caialoy fcilunruj Transistors and Reciiliers 145 Hampshire Si ., Cambr idye, Mass. 4 WATT IR LASER DIODE $7.95 PRINTED CIRCUIT BOARD 4 1'2"x6-1/2" SINGLE SIDED FPOXY BOARD 1/16" ihicfc. unetched S.50 ea 5/S2.20 VECTOR BOARD 1" SPACING 4.5" x 6'" SHEET . Sl.50 2N 3820 P FET S .45 2N 5457 N FET S .15 2N4891 UJT S .45 TIS43 UJT S .35 ER900 TRIGGER DIODES 4/S1 .00 2N 6028 PROG. UJT S .65 VERIPAX PC BOARD This board is a 1/16" sini|ln sided papei epoxv board. 4'/,"x6'/," DRILLED and ETCHED winch will hold up to 21 stnijle 14 pin IC's or 8, 16. or LSI DIP IC's with busses foi power supply connecioi S400 MV 5691 YELLOW-GREEN BIPOLAR LED SI. 25 MT-2 PHOTO TRANS S 60 RED, YELLOW, GREEN OR AMBER LARGE LED's . . . ea. S 20 14 PIN DIP SOCKETS S 25 16 PIN DIP SOCKETS S -28 MOLEX PINS 100/S1.00 1000/S8.00 8 PIN MINI DIP SOCKETS S 25 10 WATT 2ENERS 3.9, 47. 5.6, 8.2, 12, (5 18 OR 22V. 100. 150. 200. . . ea S .60 1 WATT ZENERS 4 7. 5.6, 10, 12. 15, 18 OR 22V ea. S .25 TANTULUM CAPACITORS Silicon Power Rectifiers PRV 1A 3A 12A 50 A 125A 100 .06 .14 .30 .80 3.70 200 .07 .20 .35 1.15 4.25 400 .09 .25 .50 1.40 6.50 600 .11 .30 .70 1.80 8.50 800 .15 .35 .90 2.30 10.50 1000 .20 .45 1.10 2.75 12.50 SILICON SOLAR CELLS 2%" diameter .5V at 500 ma. . $5.00 ea., 6/S27.50 REGULATED MODULAR POWER SUPPLIES t-15 VDC AT lOOrna 115VAC INPUT S27.95 5VDC AT 1 A. 1 15V AC NPUT . . . S24.95 12 VDC AT .54 S24.95 52Uf 35V 5 SI (JO 47UF 35V 5/S1.00 68UF 35V 5/S 1.00 1UF 35V 5.'S1.00 3.3UF 35V 4 'SI. 00 4 /UF 35V 4-S1.00 6 8UF 35V 22UF 35V 33UF 35V :U)UF 6V 47UF 35V 10DUF 35V IfiQUj 15V ii.Sl 00 S .50 C_[ /Qui Al AH .VI CI i H.I. rillP S5.7 NATIONAL MOS DEVICES MM 1402 MM 1403 MM1404 MM5013 MM5016 MM5017- MM5055- MM5056 2.70 2.25 2.25 MM505 MM5058 MM50G0 MM 5061 MM5555 MM5556 MM5210 MM5260 2.75 2.50 74 LOO 7400 - 7401 7402 7403 7404 7405 7406 7407- 7408 7409 7410 7411 7412 7413- 7414 7416 741 7 7420- 7426 7427- 7430 7432 7437- 7438 7440- 744 I TTL IC SERIES 7442 7445 7446- 744 7 7448 7472- 74 73 7474- 74 75 7476 7480- 7483- 7485- 7486- 7489 : 7490 7491 7492 7493 7494 - 7495 7496 74107 74121 - 74123 - 74125- 74 1 26 - 74150- 74151 74153- 74154- 74155- 74157- 7 Ft 74161 1 00 74164- 1 OR 74165- 1.05 74173 1.35 74174 1.20 74175 .95 74177- 1.00 74180- 1 ,00 74181- 2.10 74190- 1.1b 74191- 1.10 74 1 92- ,H5 74193 .8b 74 194- 1 2b 74195- ,74 74 1 96 1.10 742E3 1 50 75324- 1,75 75491 - 60 75492- .60 MIN ATURE DIP SW TCHFS C1S-2GG-4 Four SPST wit hes in one minidip pack uje. . S1 50 crs-206-s Eiiihi SPST iwii •Man in a 16 pili DIP package. S2 55 i I013-A3OK s irssl UART. Full Wave Bridges SANKEN AUDIO POWER AMPS Si 1010 G 10 WATTS S 6.90 Si 1020 G 20 WATTS SI 3.95 Si 1050 G 50 WATTS S24.95 PRV " ~2/T~~ 6A 25A~ 200 .95" ~_~ 1.25 2 .00 400" Yl5~"_ 1.50 3.00 600 1.35 1.75 4.00 CD 110 LINEAR 256 XI BIT SELF SCANNING CHARGED COUPLED D EVISE $99.00 LINEAR CIRCUITS LM 309K 5V 1 A REGULATOR , . Si .25 723 - 40 -» 40VV REGULATOR . , S .50 301/748-Hi Per. Op. Amp S .31 320T5. 12, 15, GR 24V NEGATIVE REG SI. 50 741 A o. 741 C OP AMP S .31 710 COMPARATOR S .35 307 OP AMP $ ,31 CA 3047 HI Pef. Op. Amp 340T 5, 6, 8, 12,15, 18.24V POS REG. TO-220 101 DPER. AMP. HI PERFORM. . . LM 308 Oper. Amp., Low Power . . 747 - DUAL 741 556 - DUAL TIMER 537 - PRECISION OP. AMP LM 3900 - QUAD OP. AMP .... LM 324 QUAD 741 560 - PHASE LOCK LOOP .... 5G1 PHASE LOCK LOOP ... 565 - PHASE LOCK LOOP .... 566 FUNCTION GEN 567 - TONE DECODER LM 1310N FM STEREO DEMOD. . 8038 IC VOLTAGE CONT. OSC. . LM370 AGC SQUELCH AMP. . 555 -2ys - 2 HR. TIMER 553 OUAD TIMER FCD 810 OPTO-ISOLATOR .... 1458 DUAL OP AMP LM 380 - 2W AUDIO AMP LM 377 - 2W Steieo Audio Amp. , LM381 - STEREO PREAMP, . , . LM 382 DUAL AUDIO PREAMP LM311 - HI PER. COMPARATOR LM319 Dual Hi Speed Comp. . . 'LM339 QUAD COMPARATOR S .95 S150 S .75 S .95 S .65 $1.00 SI .70 S 49 SI. 50 S2.00 S2.00 SI, 25 S1.65 SI. 50 S2.75 S3.90 SI. 15 S .45 S2.50 S .80 S 60 S .95 S2.50 SI .50 SI. 50 S .90 SI. 25 S1.50 ALCO MINIATURE TOGGLE SWITCHES MTA 106SPDT SI. 20 MTA 206 DPDT . . . S1.70 Terms: FOB Cambridge, Mass. Send Check or Money Order. Order $5.00, COD'S $20.00 SOLID STATE SALES P.O. BOX 74B SOMERVILLE, MASS. 02143 TEL. (617) 547-4005 WE SHIP OVER 95% OF OUR ORDERS THE DAY WE RECEIVE THEM Text continued from page 109 turn off instructions to the machine. These routines will be different for other users because of the hardware in the interface. This listing incorporates the routines used on the development system as an example only. Modifications to the Monitor This monitor was assembled to reside in low memory. Thus when the system is first turned on, the power reset circuit will put it into the monitor. A large area of ROM in low memory has been saved for future expansion. This expansion area will include drivers for high speed paper tape devices and for a cassette interface. Summary Although presented as an AMSAT users monitor, its use is by no means limited to AMSAT members. Anybody who has an 8080 system will be able to use, modify or otherwise operate upon this software." Listing 2: An example of use of the AMS80 monitor. (All numbers are in hexadecimal notation.) The "sign on" message is printed wher- ever the monitor is initiated. A command is entered to examine the contents of memory location 1234. It contains the number 42. The number 01 is typed in, the monitor echoes the 01, and then a line feed character is typed in, advising the monitor to examine the next location. Locations 1235 through 1237 are examined and changed in the same manner. At 1238 the sequence is terminated. The contents of memory locations 1234 through 1238 are then examined without changes. Then at 1238, the address pointer is AMS8 V2.0 Sign on message Display block Fill memory area with constant ** A 1234 1235 1236 1237 1238 ** A 1234 1 235 1236 1237 1238 1237 ** 1234 ** F ** D 1234 »* C 1300 ** M ** D 1300 ** n ** R A=00 ** RA=00 * * RA= 1 2 ** RA=12 ** R A=00 F=46 B=0D C=0D D«00 E=03 H=00 L=C3 ** P 1243 1248 PAUSE : 06 1243003A01CD950 1D235 Punch tape Note: The program expects a new command after printing asterisks. 1 2 34 Examine Memory Location 1234 42 01 01 Change Contents 01 02 02 CD 03 03 A4 04 04 02 1234 Examine without changing contents 01 02 03 04 02 - Back up one location 04 1234 1238 01 02 03 04 02 1234 1238 76 OKi 1234 1238 76 76 76 1300 1304 Fl 1 1 0E 0C FE 1234 1238 1300 1300 1304 76 76 76 76 76 1342 1234 1345 Examine registers F=46 B=0D C=0D D=00 E=03 H=00 L=C3 P-3CD2 S=2FE2 76 7 6 Display it Display another area OK? Move block Verify that data was moved OK? ABORTED! Aborted function 1 2 Change accumulator [A] 00 Change it back Examine registers-i P=3CD2 S*2FE2 ** E PAUSE : 00000001FF *+ X 3800 ** J 3800 8080 V3.0 Punch end of file mark Set up location of Intel Monitor OK? Go to it Program executing backed up by the " — " command to examine the contents of location 1237. The block of memory from 1234 to 1238 is then displayed. A command is then entered to fill each location within the block of memory from 1234 to 1238 with the number 76 (the 8080 HLT instruction). After entering parameters, the computer asks "OK?". If a "space" character is typed, the fill command is executed. The contents of the block of memory are then displayed and sure enough the 76s have been entered. Next the contents of the block of mem- ory locations from 1300 to 1304 are dis- played. After this command to move the contents of memory locations 1234 to 1238 to a block starting at location 1300 is given. The monitor again asks "OK?" so you can verify addresses, after which depressing the "space" key causes the move command to be executed. The contents of memory loca- tions 1300 to 1304 are then displayed to verify the execution of the move command. If a move command (or other command of this type) is then entered incorrectly, it can be aborted by depressing the "CR" key after the query "OK?". The contents of the registers are exam- ined using the "R" command. The contents of the accumulator are changed using the "RA " command after which all registers are again examined using "R ". A punch command is then entered and a "PAUSE" is typed out by the monitor. When the tape punch is deemed to be ready, typing a "space" character causes the com- mand to execute and punch the tape as instructed. The program then pauses, and s when the tape punch is deemed to be off, execution continues after another "space" character is depressed. An end of file mark is then punched in a similar manner. Finally an execution address of 3800 is set up with "X" and the program is entered with a "J " command. The program starting at memory location 3800 begins executing, printing out the message "8080 V 3.0" which ends this example, m 122 MC14412 UNIVERSAL MODEM CHIP MC14412 contains a complete FSK modulator and de-mod- ulator compatible with foreign and USA communications. (0-600 BPS) FEATURES: .On chip crystal oscillator .Echo suppressor disable tone generator .Originate and answer modes .Simplex, half-duplex, and full duplex operation • On chip sine wave .Modem self test mode .Selectable data rates: 0-200 0-300 0-600 .Single supply VDD=4.75 to 15VDC - FL suffix VDD=4. 75 to 6 VDC - VL suffix TYPICAL APPLICATIONS: .Stand alone - low speed modems .Built - in low speed modems .Remote terminals, accoustic couplers MC14412FL S28.99 MC14412VL $21.74 6 pages of data .60 Crystal for the above S4.95 MC14411 BIT RATE GENERATOR. Single chip for generating selectable frequencies for equip- ment in data communications such as TTY, printers, CRT s or microprocessors. Generates 14 different standard bit rates which ore multiplied under external control to IX, 8X, 16X or 64X initial value. Operates from single +5 volt supply. MC14411 .», $11.98 4 pages of data 40 Crystal for the above $4.95 FLUID LEVEL DETECTOR. LM1 830 is used to compare exter- nal probe to probe resistance with a reference resistor. Use as water level detector or with any polar fluid. Smoke level detector can be made by substituting a photo cell for the fluid probes... etc. LM1830. . .$2.99. Specs .60 - . H PRECISION REFERENCE DIODE. LM399 is a temperature- stabilized monolithic zener and buffer. Internal heater stabilizes output to .0002%/°C. Buffer reduces zener im- pedance to .5 ohm. Use in lab standards and calibrators. Initial break down tolerance is 2%. LM399H $5.95. Specs for LM399H..60g 4 DIGIT COUNTER. MM74C926 is a 4 digit counter with 7 segment output. Carry output for cascading and intermal display select allows outputting of counter or set of internal latches. 3 to 6V operation. Great for clocks, event and frequency counters. MM74C926- with spec sheet $12.00 FOUR QUADRANT MULTIPLIER. MC1495L provides output as a linear product of two analog input. Use for frequency doubler, balanced modutar/demodulator, electronics gains control. MC1495L $5.50 6 pages of specs 60 9 pages of applications 90 TELETYPE CODE CONVERSION CHIP MM5220BL converts 5 level Baudot into 8 level ASCII. Use this chip to make your old TTY talk to your new computer. MM5220BL fc . $1 8 . 00 Specs for the above .30 MOS TIME BASE KIT. Only 1" X 1.5". Input 5 to 15 VDC, output is 60HZ square wove for portable or mobile clocks. PC board is drilled ! MTBK-60HZ $5.88 78H05 Voltage regulator. Fairchild 5V, 5A, TO-3 reg- ulator. Take care of those heavy current requirments with- out separate regulator/pass transistor combinations. Use it with the same ease of instalation as the 309K(same pin arrangement.) with specs $11 .25 LM317 Voltage Regulator. 1 .5A, 3 terminal adjustable regulator in TO-3 case. Adjusts from +1 .2V to +37V. Complete overload protection. .1% load regulation, .01%/V line regulation. No need to stock assorted reg- ulators - just stock resistors $4.99 Specs for the above 70 DATA BOOKS BY NATIONAL SEMICONDUCTOR DIGITAL . Covers TTL, DTL, Tri-State, etc $3.95 LIN EAR. Covers amplifiers, pre-amps, op-amps, . . $3.95 LINEAR APPLICATIONS. Dozens of application notes and technical briefs covering the use of op-amps, regulators, phase locked loops and audio amps $3.25 CMOS Gates, Flip Flops, registers, functional blocks $3 VOLTAGE REGULATORS. A must for anyone making a power supply. Complete theory including transformers, filters, heat sinks, regulators, etc $3.00 MEMORY. Information on MOS and Bipolar memories': RAMS, ROMS, PROMS and decoders/encoders $3.95 INTERFACE. Covers peripheral drivers, level translators, line driver/receivers, memory and clock drivers, sense amps display driver and opto-couplers $3.95 (Outside U.S., add postage for 1.5lbsl DATA BOOKS FROM FAIRCHILD. uA Linear. 776 pages of data and applications for Fair- child linear ICt Great value $4.25 MOS/CMOS/nMOS/pMOS/CCD. Data and applications on MOS and charge coupled devices including preliminary data on new and future offerings. Want to know about 16K charge coupled line addressable memories? $3.95 imfism Soys GET YOUR HIGHER EDUCATION AT GOOD OLD TTI* WITH THE LATEST IN DATA BOOKS AND MANUALS *Tri-Tek, Inc. GOLD CHIP Linear Integrated Circuits Brand new process by RCA in which the aluminum metalization has been replaced by gold. The chip is then hermetically seal- ed. What this means to you is unprecedented reliability and uniformity. Plastic parts that meet mil specs! ! Tri-Tek is proud to be the first to bring this new level of performance to you at SURPLUS PRICES. Why buy regrades?? CA30I A. . Improved, general purpose op-amp, 8 pin dip.. 59c CA307. . .Super 741 op-amp. 8 pin dip 52c. CA324. . .Compensated quad op-amp, 14 pin dip SI .80 CA339A.. Low offset quad comparator. 14 pin dip. ..$1.59 CA741 C. . Famous general purpose op-omp, 8 pin dip.. 45g CA747C. .General purpose dual op-amp, 14 pin dip... 82c CA748C. .Externally compensated 741, 8 pin dip 49c CA1458. . General purpose dual op-amp. 8 pin dip 69c CA3401..Quad single supply (5-18V) op amp. 14 prn..89< Another super buy from RCA. CA555 timer. 8 pin dip. 59c NEW NATIONAL BOOKS! AUDIO HANDBOOK contains detailed discussions, including complete design particulars, covering many areas of audio with real world design examples. .. $3. 25 SPECIAL FUNCTIONS DATA BOOK contains detailed information for specifying and applying special amplifiers, buffers, clock drivers, analog switches and D/A-A/D converter products $3 . 25 ULTRASONIC TRANSCEIVER. LM1812 is a special I.C. containing a 12W ultrasonic transmitter, selective receiver, noise rejection circuitry, display driver and keyed modulator. Use in sonars, burglar alarms, liquid level control, direction control for model submarines, etc. LM1B12 $9.15. Specs and apps 60c PRECISION REFERENCE AMP LH0070-1H provides a precise 10.0 volts for use in BCD A to D converters or meter calibrators. Typical initial accuracy is .3% (t ,03V). Comes in TO-5 can. LH0070-1 H with specs $5.35 TV CAMERA SYNC GENERATOR. MM5320N I.C generates all sync signa s for T.V. camerc Even color ! ! . MM5320N ....$18.80... $1 .00 T.V. CLOCK CHIP SET. MM53 18/5841 two chip set 'orms basis for time of day display on your TV screen. If teresting and convenient way to keep time. MM53 18/5841 Set $22.45 ..SI .00 D-A CONVERTER BY ZELTEX 8 bir precision hybrid circuit for use in controllers, timers, volt meters, etc. Molded plastic package with P.C. pins. Super buy on this better than usual subsystem. ZELTEX model ZD430. DAC-430 $4 .95 NEW BOOK!!! "An Introduction to Microcomputers" This is the book which Fairchild Semiconductor Company called " the best darned introduction to the industry to date." Covers everything from basic concepts to a re- view of real microcomputers. IMC-001 $8.00 tRi-tek, inc. 6522 noRth 43R6 avenue, QlendAle, ARizona 85301 phone 602 - 931-6949 We pay shipping on all orders over $10 US, $15 foreign in US funds. Orders under $10, please add $1 handling. Please add insurance. Master Charge and Bank America cards welcome, ($20 minimum) Telephone orders may be placed 11AM to 5PM doily, Mon thru Fri. Call 602-931 -4528. Check reader service card or send stamp for our latest flyers packed with new and surplus electronic components. Programming Quickies: 8 Bit Fractional Multiplication Ira Chayut, 3030 Brighton 12th St, Brooklyn NY 11235, submits the following subroutine for a Motorola 6800 which returns the most significant 8 bits of the integer product of two 8 bit operands. The program is shown here beginning at address 0000 hexadecimal. This multiplication is equivalent to treating one number (for example the argument in A) as an integer from to 255 and the second number (for example the argument in B) as a fraction from 1/256 to 255/256. Ira wrote the routine for use in a digital filtering application where the fractional interpretation was needed. The version sub- mitted was located at addresses 026F to Do you ever spend a spare moment creating a little program or subroutine to explore some of the possibilities of your computer? Write down a symbolic and abso- lute listing in the language of your computer plus a short paragraph describing the pro- gram and its purpose. Then send the result to Quickies, BYTE, 70 Main St, Peter- borough NH 03458. Each Programming Quickie published will earn its originator $20 worth of fame and fortune. Addr Hex Code B7 00 10 Label MULT Op STAA Operand 0000 ARG1 0003 4F CLRA 0004 74 00 10 MLOOP LSR ARG1 0007 58 ASLB 0008 24 03 BCC NONADD 000A BB00 10 ADDA ARG1 000 D 26 F5 NONADD BNE MLOOP 000 F 39 RTS 0010 ARG1 027F as an artifact of the Motorola Design Evaluation Kit which was used; we've re- located it to location 0000 (but we kept the long form of memory reference to ARG1). To relocate this program at an arbitrary address, the address constants in instructions at locations 0000, 0004, and 000A will have to be changed to reflect the new location of ARG1. Commentary ARG1 := A [save in temporary] ; A := [initial product sum is zero] ARG1 := ARG1 12; CY := MSB(B); B := ASL(B,1); if CY = then skip the addition; else A := A + ARG1; if ARG2 NE then reiterate; else return with result in A; single byte temporary data area, uninitialized; Computing 1776 Poster Robert Tinney painted a beautiful oil painting on a bicentennial theme bridging two centuries of America's development. This painting has been reproduced on the cover of this issue, and a full-sized poster in color without the BYTE logo has been printed for you. It will make a perfect wall decoration in your office, home or computer room. The poster is 20" by 24" (51 cm by 61 cm) large with a white border of 2 inches (5 cm) at all four sides. The image size is 16" by 20" (41 cm by 51 cm), and it is the original size. The price is -$2.95 postpaid, and the poster is shipped in a mailing tube to avoid folding. Only 2,000 copies have been printed on the first run which will be sold on a first come first served basis. So hurry if you want to be among the first to show this beautiful poster to your friends. BYTE Posters PO Box 274 Jaffrey Center NH 03454 603-924-7217 Name Allow 6 - 8 weeks for processing. . Posters $2.95 each Address City _State . -Zip. O Bill BankAmericard □ Bill Master Charge No □Check Enclosed . Exp. Date 124 %r': 7400N TTL SN7400N SN7401N SN7402N SN7403N SN7404N* SN7405N SN7406N SN7407N SN7408N SN7409N SN7410N* SN7411N SN7412N SN7413N 5N7414N SH7416N SN7417N SN7420N SN7421N SN7422N" SN7423N SN7425N SN7426N SN7427N SN7429N SN7430N SN7432N SN7437N SN7438N SN7439N SN744QN SN7441N SN7442N SN7443N SN7444N SN744SN SN7446N SN7447N* SN7448N SN7450N | SN7451N SN7453N SN7454N SN7459A SN7460N SN7470N SN747IN' SN7472N SN7473N' SN7474N* SN7475N* SN7476N- SN7479N' SN7480N SN7482N 5N74B3N SN7485N SN7486N SN74B8N SN7489N SN7490N* SN7491N SN7492N SN7493N" SN7494N SN7495N SN7496N SN7497N* SN74100N* SN74107N SN74121N* SN74122N SN74123N- SN74125N SN74126N SN74132N SN74136N SN74141N SN74142N' SN74143N* SN74144N* SN74145N SN74147N SN7414BN SI1741S0N SN74151N 79 SN74153N .89 SN74154N* 1.25 SN74I55N .99 SN74156N .99 SN74157N 99 SN74160N 1.25 SN74161N .99 SN74163N* .99 SN74164N 1.10 SN74165N 1.10 SN74166N 1.25 SN74167N 5.50 SN74170N 2.10 SN74172N 18.00 SN74173N 1.50 SN74174N 1.25 SN74175N 99 SN74176N .90 SN74177N .90 SN74180N 99 SN74181N 249 SN74182N .95 SN74184N 1.95 SN741B5N 2.20 SN74186N* 5.00 SN74187N 6.00 SN74190N 1,19 SN74191N 1.25 SN74192N* 89 SN74193N* 89 SN74194N 125 SN74195N .75 SN74196N 1 25 SN74197N 75 SN74198N 1.75 SN74199N 1 75 5N742Q0N 5.59 SN74279N* .90 SN74251N 179 SN742B4N 6.00 SN74285N 6 00 MANY OTHERS AVAILABLE ON REQUEST 20% Discount for 100 Combined 7400's CO4000 CD4001 C04002 CD4006 CO40O7 CD4009 CD4010 CD4011 CD4012 CD4013 C04016 CD4017 CO4019 C04020 CD4022 CD4023 CD4024 CD4025 CO4027 CO4028 CD4029 CD4030 CMOS CD4035 C04Q40 CD4042 CD4044 CD4046 CO4047 CD4049 CO405O CO4051 CO4053 CD4060 CD4066 C04069 CO4071 CD4072' C04081 CD45I1 C04518 74 COON 74C02N 295 2.95 3.25 74C04N 74C10N 74C20N 74C30N 74C42N 74C73N 74C74 74C90N 74C95N 74C107N 74C151 74C154 74C157 74C160 74C161 74C163 74C164 74C173 74C193 74C195 MC4044* MC14016" LM30CH LM301H LM301CN LM302H LM304H LM3G5H LM307CN LM3Q8H LM308CN LM309H LM309K LM310CN LM311H LM311N LM3IBCN LM319N LM319D LM320K-5 LM320K-5 2 LM320K-12 LM320K-1S LM320T-5* LM320T-8" LM320T-12' LM320T-1B* LM323K-S- LM324N LM339N LM340K-5 LM34QK-12 LM340K-15 LM34QK-24 IM340T-5 LM340T-6 LM34QT-B' LM340T-1B- LM140T-12 LM340T-15 LM340T-24 LM350N LM351CN LM370N LM370H LM373N LINEAR LM377N LU380N LM3B0CN LM3B1N LM382N NE501K N6510A NE531H NE536T NE540L NE550N NE5S3 NE555V* NE5608- NE561B- NE562B" NE565H* NE565N* NE566CN* NE567H* NE567V* LM703CN LM709H LM709N LM7I0N LM711N LM723N LM723H LM733N LM739N LM741CH LM741CN LM74I 14N LM747H LM747N LM748H LM74SN LM1303N LM1304N LM1305N LM1307N LM1310N LM13S1N 1 LM1414N 1 LM1458C LM1496N LM 1556V 1 LM2111N 1 LM2901N 2 LM3065N LM3900N LM3905N LM3903* 1 LM5556N 1 MC5558V 1 LM7525N LM7535N 1 803BB" 4 LM75450 75451CN 75452CN 75453CH 75454CN 75491CN 75492CW 75494CN RCA LINEAR CA3013 2 CA3023 2 CA3035 2 CA3039 1 CA3046 1 CA3059 3 CA306O 3 CA3080 CA30B1 2 CA3082 2 CA3083 1 CA30B6 CA30B9 3 CA3091 10 CA3123 2 CA3130 I CA3600 1 RC4194 5 RC4195 3 KITS EXAR ics XR-2206KA SPECIAL $17.95 Includes monolilhic tunciion generator IC. PC board, and assembly instruction TianuaJ. XH-22MKB SPECIAL $27.95 Same as XR 2206KA above and includes external components tor PC Ooarrt. TIMERS XR-555CP XR-320P XR-556CP XR-2556CP XR-2240CP PHASE LOCKED LOOPS XR-210 i XR-215 t XR-S67CP 1 XR-2567CP i 3.20 3.25 STEREO OECOOERS XR-1310P XR-1310EP XR18O0P WAVEFORM GENERATORS XR-205 XR-2206CP XR-2207CP MISCELLANEOUS XR-2211CP XR4136 $3.20 3.20 3.20 100 per strip MOLEX PINS Intended for use as an inexpensive substitute fnr IC scckets. Also perfect lor use as board connectors IHIHUl ano in subassemblies. t SPECIAL — 100/1.49— 1000/12.00 CONSUMER ELECTRONICS PONG SUPER PONG SINGLE GAME 4 GAMES IK ONE Zil PONG GAMES INCLUDED IN SUPER PONG ARE: • PONG • CATCH • SUPER PONG • HANDBALL FEATURES OF PONG ANDSUPER PONG I Incremental speed on volleys increases excitement. I Playing Held adjusts to any size screen. I Game appears in color or in black * white, depending on letevsion sel I Unmctakable "PONG' sound accompanies each volley. I Digital scoring flashes on ihe screen between each point. I 2 player challenge or Solitaire I Hooks up smply (o any model television sel: the screen actually becomes the playing field I English and other techniques can Dp used 10 make any member c! ihe family a Pong champion i Ballery operated By 4 size "D" flashlight hatter ire Included Witt the Unn. AC Adaptor (Eliminates Batteries) $9.95 OPTO ELECTRONICS R ;™ EN DISCRETE LEDS 125" dia. .185" dia. .190" dia. XC209H XC209G XC209Y XC209O XC526R XC526G XC526V XC5260 XC1I1H XCI1IG XC111Y fe .200" dia. .200" dia. XC22H XC22G XC22V XC220 .085" dia. MV50 085" dia. Micio red ted t-mbUA mam ■ ll TYPE MAN 1 MAN 2 MAN 3 MAM 4 MAN 7 POLARITY COMMON ANODE 5 x 7 DOT MATRIX COMMON CATHODE COMMON CATHODE COMMON ANODE MAN 7G COMMON ANODE-GREEN MAN 7Y COMMON ANODE-YELLOW MAN 72 COMMON ANOCE MAN 74 DL707 OL747 DL750 DL33B FND70 FN0503 FNDBOr COMMON CATHODE COMMON ANODE COMMON ANODE COMMON CATHODE COMMON CATHODE COMMON CATHODE COMMON CATHODE COMMON ANODE 300 SI. 50 .300 S1.50 600 2.25 16 pin IB pin 22 pin IC SOLDERTAIL — LOW PROFILE (TIN) SOCKETS 5 SOLDERTAIL STANDARD (TIN) 10 pin 14 pin 16 pin IB pin SOLDERTAIL STANDARD (GOLD) WIRE WRAP SOCKETS (GOLD) LEVEL #3 24 pin SI .05 28 pin 1 40 36 pin 159 40 pin 1.75 50 PCS. RESISTOR ASSORTMENTS $1 .25 PER ASST. ASST. 1 ASST. 2 ASST. 3 ASST. 4 ASST. 5 ASST. G ASST. 7 ALL OTHER 5-25 PCS 10 OHM 12 OHM 15 OHM 18 OHM 22 OHM 27 OHM 33 OHM 39 OHM 47 OHM 56 OHM 68 OHM 82 OHM 100 OHM 120 OHM 150 OHM 1BOOHM 220 OHM 270 OHM 330 OHM 390 OHM 470 OHM 560 OHM 680 OHM 820 OHM IK 1.2K 1.SK 1.8K 2.2K 3.3K 1E0K 390K 5 m. 2 7M RESISTORS 1? FROM 30-95 3.9K I60K 470K 1.2M 3.3M 2.2 PCS 4 7K 220K 560K 5 6K tOOK 270K 680K 2.7K 6 8K 120K 330K 820K 0-i 4.7M 5.6M 5 6M AVAILABLE 100-495 PCS: 1/4 WATT 5% 50 PCS. 1/4 WATT 5% - 50 PCS. 1/4 WATT 5% - 50 PCS. 1/4 WATT 5% ■ 50 PCS. 1/4 WATT 5% 50 PCS. 1/4 WATT 5% - 50 PCS. 1/4 WATT 5% ■ 50PCS. MULTIPLES OF 3 ea 03 ea 500-995: .0275 ea. 14 PCS. POTENTIOMETER ASSORTMENTS ASST. A 2 ea: 10 OHM-20 OHM-50 OHM-100 OHM-200 OHM-250 OHM-500 OHM ASST. B 2 ea: IK, 2K, 5K. 10K. 20K. ?OK 50K ASST. C2ea: SOK, 100K. 2O0K, 250K, 500K. 1M. 2M $9.95 PBf ASSt. Each assortment contains 14 pes ol 10 turn pots. All pots ate available in single unit quantities. S.99 e. *Astrisk Denotes Items On Special For This Month* Satisfaction Guaranteed. $5.00 Min. Order. U.S. Funds. California Residents — Add 6% Sales Tax — Data Sheets 25c each Send a 13c Stamp (postage) tor a FREE 1976 Catalog 1021 HOWARD AVE., SAN CARLOS, CA. 94070 PHONE ORDERS — (415) 592-8097 74LS00 74LS02 74LS03 74LS04 74LS05 74LS0B 74LS10 74LS13 74LSI4 74LS20 74LS26 74LS27 74LS28 74LS30 74LS32 74LS40 74LS5I 74.LS00 TTL 7-ILS55 741S73 74LS74 74LS75 74LS76 74LSB3 74LSB6 74LS9Q 7.SLS92 74LS93 74LS95 74LS9S 74LS107 74LS112 74LS132 7-1 LSI 36 74 LS 74LS151 74LS153 74 LSI 57 74 LSI 62 74 LSI 63 74LS164 741S181 74 LSI 90 74 LSI 91 74LS192 74LS193 74LS194 74LS195 74LS257 MLS260 74LS279 74LS670 2.85 2.85 2.2S 2.25 DATA HANDBOOKS n out & Description of 5400/7400 ICS $2.95 n out & Description of 4000 Series ICS $2.95 "-out & Functional Description $2.95 ALL THREE HANDBOOK$ S6.95 DPOT mf 10-M »« ON NONE « f 2.95 2.55 f.B7 1.70 6 a ON 113 2.95 2.15 1.58 1.43 >v'i 0„ «» ON ON I ,.« IBS Mi 13) .30 MINIATURE TOGGLE PUSH BUTTON Model 1 Quanlty nel pricas Number Each 2-9 10-29 30-99 PQ 123 S2.35 SI 95 S1.47 SI 30 PB-126 S2.35 SI 95 51.47 S1.30 ! THUMBWHEEL SWITCHES B POSITION TlOTARinWITCH TnesrsTSTTc z ? position one FOR TYPE IN746 1N751A 1N752 1N753 1N754 IN96S8 1N5232 1N5234 1N5235 1N5236 1N450 1N45B 1ISJ485A 1N4001 1N4002 1N4003 1N40D4 ZENERS — DIODES — RECTIFIERS 400m 400m JOOm 400m JOOm 400m 50 PIV 1 00 PI V 200 PIV 400 PIV 7m 5/100 10m 5-1 00 1 AMP 121.00 I TYPE VOLTS 1N4005" 600 PIV 1N4006* 800 PIV 1N4007* 1000 PIV 1M3600 SO 1N4148 75 1N4154 35 1N4734 5.B IN4735 6.2 1N4736 6.8 1N4738 B.2 IN4742 12 IN4744 15 1N11B3 50 PIV 1N11B4 100 PIV 1N118G 200 PIV •N11B8 400 PIV 1 AMP 1 AMP 1 AMP 200m ton .00 10/1.00 10/1.00 35 AMP 35 AMP 35 AMP 35 AMP MPS A05 MPS AC* 2NJ219A 2N2J2! 2H222!I<- 2N2369 ?N2369A FN2415 2N24S4 2N2906A 2N2907A 2N2925 2N30S3 2N3055 MJE30SS MJE2955 2N339S 2M339S 3«1 00 431 JO am.oo 5 SI 00 4S10O 5.-S1 00 4/S1 00 TRAN5ISTORS PN3569 ill .00 7. 2N3701 SSI 00 tri 2H3705 5 SI 00 ML 2N3706 531 00 JT 2N3707 5/S1.D0 I 2N3711 5/S1 00 2N3724 S 65 ' L PN356T 3/S1 00 PN35BB 4JJ1 00 PN356!) 4'ST .00 2N3704 5 SI 00 2H3705 SSI DO 2N3706 5.S1 00 2N3707 5,'S1 .00 2N3711 5/SI 00 2N3724 S 65 2N372S SI CO 2N3903 5*100 2N3904 4/11 00 2N3905 4S) 00 2N3906 JrSlOO 2N4013 3,11 00 2N4014 3SI 00 PN4249 PN4250 2NM00 2N4401 2N4J02 2N4403 7NJ409 2N50B6 2N50B7 2NS08S 2N50B9 2H5I29 2N5138 2N5139 2N5209 2N595I 47 pi 100 pl 220 pi 470 pf .001ml .0022 0047ml 01ml .1 35V .15 35V 22 35V .33 35V •1735V .G835V 1.035V .47[50V 1.0 50V 3.3 50V 4.7 25V 10 25 V 10 50V 22 25V 22 50V 47 25V 47 50V 100 25V 100 50V 220 25V 220 50V 470 25V 1000 16V 2200 16V .12 CAPACITOR CORNER 50 VOLT CERAMIC DISC CAPACITORS 10-49 50-100 1-9 10- 04 .03 OOVF .05 .0 .04 .03 0047 M F ,05 .0 .04 .03 .QVF .05 .0 .04 .03 022fiF 06 .0 04 03 047^F 06 .0 04 035 .l^F 12 .0 100 VOLT MYLAR FILM CAPACITORS 022ml 047ml .07 .tml .27 12 10 07 22mt - 20% DIPPED TANTALUMS (SOLID) CAPACITORS 28 -23 .17 1.5138V .30 .26 28 .,23 .17 2.2|25V .31 .27 28 .23 .17 3.3 25V .31 .27 2B .23 .17 4.7 25V .32 .28 28 .23 .17 6.8 25V .36 .31 28 .23 .17 10 25V 40 -35 28 .23 .17 15 25V 63 -50 MINIATURE ALUMINUM ELECTROLYTIC CAPACITORS Axial LBid .15 .13 .10 .47 25V 15 .47 50V .16 1.0 16V .15 1.0 25V .16 1.0 50V 16 4.7 16V .15 4.7 25V .15 4.7 50V .16 10 16V 14 10 25V 15 10 50V .16 47 50V .24 100 16V 19 100 25V 24 100 50V .35 220 16V .23 470 25V .31 Radial Lead .13 Continued from page 8 for computer people to meet computer people, and for the transfer of technical information through the vehicle of the seminars to be held during the show. And then, of course, there is always the prospect of technological surprises cooked up in the laboratories and workshops of various per- sons and organizations .... A Note About Publicity in BYTE The planning and execution of an event such as the Personal Computing '76 show must begin a long time in advance of the actual event. When John Dilks first called in January and asked for some publicity for the show, it was eight months in advance, yet in view of the things he had to get done, it felt like the show was to be held the next week. The lead time was nearly nine months for this show, and that might be too short for a large event (which the show has become, thanks to the generous support of interested attendees and manufacturers). For example, another large show mentioned earlier, the the AFIPS National Computer Conference has a cycle of planning which begins more than 18 months ahead of the date of the show. BYTE has worked quite closely with the organizers of the Personal Computing '76 show from its inception last January. It is in the interests of those participating in this exciting maturation of computing technolo- gy to help call attention to the prospects and utility of personal computing systems. In effect, such events help "sell" the idea and promote a larger market with more options and more products through education. If your club or organization is planning to hold a computer festival, flea market or other event to' help publicize the idea of personal computing systems, BYTE will extend a similar hand. We won't promise to give the same coverage to a regional or local show as we would for an event which is clearly national in scope; but the principle is the same in either case: Help bring people with our common interests together for purposes of fun, enjoyment, education and com- merce. An important thing to remember is that planning should begin well ahead of the event (three months at least in terms of the magazine production cycle). I'll be looking forward to meeting many BYTE readers at Personal Computing '76, as has happened in the past at events such as the World Altair Convention in Albuquer- que, the Trenton Computer Festival, and the NCC show in New York." At Last! BYTE T-shirts are here! At last! No more wardrobe crises! BYTE T-shirts are here! Now you have the perfect garb for computer club meetings, Altair Conven- tions, playing Shooting Stars and computer chess. (A pair of trousers from your own closet is suggested as an addition to the BYTE T-shirt. The Bytique can't do everything for you.) BYTE T-shirts are of top quality 100% cotton or cotton-polyester. The original design, by artist Judy Lee Rehling, is silk screened in red on white shirts with blue trim on collars and sleeves, or on blue heather shirts. Each shirt is mailed first class for safe, rapid delivery to you. The $5 price includes handling and first class postage. Send to: The Bytique In unusual cases, processing may exceed 30 days. PO Box 274 Jaffrey Center NH 03454 Please send me extra large large medium small Total enclosed $ Bill MasterCharge No Bill BankAmericard No._ Name Address City blue heather white with blue trim and red letters T-shirts @ $5 each (includes hand- ling and first class postage) Exp. Date Exp. Date Signature Other colors, styles I'd like to see_ _State_ _Zip_ 126 UNIVERSAL POWER SUPPLY A unique plug-in supply by Panasonic. Useful for calculators, small radios, charging many & various small NiCad batteries. Adjustment screw plug on the side changes output voltage to 4 1 /2, 6, TA, or 9 volts DC at 100 MA. Output cord with plug, 6 ft long. No. SP-143C $4.50 3/$12 POWER SUPPLY LAMBDA 5VDC 74 AMP LV-EE-5-OV $125.00 NJE 5/OUP-D5 5 VDC 32 AMP $75.00 CLOCK KIT $14.00 Includes all parts with MM5316 chip, etched & drilled PC board, transformer, everything except case. SP-284 $14.00 each 2/$25.00 f^M^^ 1 ^ PARITY DETECTOR New packaged, made for RCA, detects even or odd parity, baud rate 110, 150 or 134.46. Built-in logic supply for the IC's, operates from standard 115 vac. Control panel allows manual or automatic reset mode of operation. Aluminum enclosure (not shown), covers the electronics. TTY compatible. Ship wgt. 10 lbs. $16.50 COMPUTER DISPLAY TUBE New Sylvania 9 inch CRT, 85 degree deflection, with tinted faceplate. Same as used in Viatron systems (buy a spare). With complete specs. Ship wgt. 5 lbs. $15.00 LINEAR by RCA, brand new, gold bond process 301 307 324 339A 741 $ .60 .52 1.80 1.60 .50 747 748 1458 3401 555 timer $ .82 .50 .96 .80 .60 MM5314 MM5316 7001 $3.00 3.00 8.00 MEMORY SYSTEM $125.00 New memory system by Honeywell, small . . . measures only 9x4x1 inches. 1024 core memory, 1024 words with 8,9,10 bits/word. Random access, with all logic, register, timing, control, core select and sense functions in one package. New, booklet of schematics and data. Looks like a good beginning for a mini-computer. Limited supply on hand. Ship wgt 3 lbs. #SP-79 $125.00 DATA ENTRY AUDIO TERMINAL Sends and receives hard copy or audio of touch tone data sent & received. Output 600 ohms for phone lines. ITT touch phone pad with oscillators. Hard copy by strip printer 5 characters per inch, 35 digits visually displayed at once. Prints & receives touch tone codes, digits only. Power supply etc. all in the one case. With two units you can send and receive with monitoring of visual & audio tone at both stations. Original cost $1065 Ship wgt. 25 lbs. $49.00 each yfle^nMd Please add shipping cost on above. PHONE 617-595-2275 FREE CATALOG SP-8 NOW READY MESHNA P0 Bx 62 E. Lynn Mass. 01904 127 bvii reader service To get further information on the products advertised in BYTE, fill out the reader service card with your name and address. Then circle the appropriate numbers for the advertisers you select from this list. Add a 9 cent stamp to the card, then drop it in the mail. Not only do you gain information, but our advertisers are encouraged to use the marketplace provided by BYTE. This helps us bring you a bigger BYTE. A116 Action Audio Electronics 101 A 94 Merrimac 95 A 70 American Microprocessors 99 A 18 Meshna 127 A107 Audio Design Electronics 97 A 93 Micon 97 A111 Brigar 105 * Microcomputer Applications 101 A120 Burkeshire 93 A 71 Micro Peripherals 101 BYTE's Books 80 A119 Midwest Scientific Inst 48 BYTE's Poster 124 A 57 Mikos 93 BYTE's Subs 111 A112 MiniTerm 8 BYTE's T-Shirts 126 * MITSCIV, 2,3,21 A 88 Cambion 99 A 22 National Multiplex 79 A 89 CFR Associates 99 A 40 Ohio Scientific Inst 75 A 83 Computer Mart of NY 99 A 64 Oliver Audio Engineering 99 A 87 Creative Computing 103, 111 A 50 Osborn and Associates Inc 43 A 41 Cromemco 1 A 63 Parasitic Engineering 49, 95 A 97 Data Domain 81 A 85 Per Com Data 69 A 7 Delta 115 A 23 Polymorphic Systems 73 A 78 Digital Group 7 A 24 Processor Tech 24, 25 A 79 Economy Co 49 A110 PTI 97 A102 Eltron 119 A 26 Scelbi 19 A 9 Godbout 117 A 27 SD Sales 106, 107 * HAL Communications 61 A 59 Solid State Sales 121 # IMS 13,83 A 29 Southwest Tech CM A113 Instrumentation Services 103 A 30 Sphere CI II •A123 Integrated Computer System 97 A 99 STM Systems 71 A117 Intel 14, 15,23 A 96 Synchro Sound 99 A118 Intersil 39 A 82 Technical Design Labs 72 A 15 James 113, 125 * Texas Instruments 34, 35 A122 John Anthony Television 101 A 32 Tri Tek 123 A 90 Logical Services 101 A115 Wilcox 101 'Reader service inquiries not solicited. Correspond directly with company. BOMB BYTE's Ongoing Monitor Box June BOMB Results Winner of the BOMB bonus for the June issue was Bob Abbott, for his article "Building an M6800 Microcomputer." The three runners-up were Dr Suding's "Systems Approach to a Personal Microprocessor," G H Gable's "Interact with an ELM," "Programming for the Beginner" by Ron Herman. Feedback is what keeps a linear amplifier in line. Like a linear amplifier, B YTE can use a bit of feedback. The BOMB analysis is done once a month to provide encouragement to authors and some formal feedback on how readers appreciate articles. BYTE pays the winning author a $50 bonus, so you can encourage the authors you like by voting your preferences. Remember that with few exceptions BYTE authors are just readers who have sat down at their typewriters to tell a story about what they've done or what they know about some aspect of this technology. LIKED PAGE ARTICLE 16 Mooers: Are You an Author? 26 Guthrie: Mathematical Function Unit— Part 1 36 Grappel: Randomize Your Programming 40 Herd: BASIC Star Trek Trainer 44 Barbier: MSC 8080+ Microcomputer 50 Brown: How to Do a Number of Conversions 62 Suding: The Circuit for Z-80s 76 Baker: SC/MP Fills a Gap 84 Wadsworth: "8008" Programming— Chapter 3 108 Allen-Kasser: AMSAT 8080 Standard Debug Monitor LEAST BEST 12 3 4 5 6 7 8 9 10 12 3 4 5 6 7 8 9 10 12 3 4 5 6 7 8 9 10 12 3 4 5 6 7 8 9 10 12 3 4 5 6 7 8 9 10 12 3 4 5 6 7 8 9 10 12 3 4 5 6 7 8 9 10 12 3 4 5 6 7 8 9 10 12 3 4 5 6 7 8 9 10 12 3 4 5 6 7 8 9 10 128 c 9 y »* M6800 CRT'S P • IP only §149 Compatible with Motorola Evaluation Kits SWT Kits Cramer Kits With a CRT interface module from Sphere you can communicate with your computer . . . PDQ! No fooling around with blinking lights, you get up to 32 characters by 16 lines of instant display on your television set or video monitor. The Sphere CRT module interfaces to your Motorola 6800 product with easy to connect flat ribbon cable bus through 16 lines of address bus, 8 lines of data bus, the VMA, the phase #2 clock and the read/write port. Mail this coupon today for your CRT PDQ - OK! Sphere CRT interface kits. Please send me Enclosed Check/Mastercharge/Bankamericard Amount $ Name Address City Card No. State & Zip Limited offer, prices subject to change • Allow up to 30 days for delivery. SPHEFE CORPORATION Distributorships Available Dept. 104 P. O. Box 213 Bountiful, Utah 84010 (801) 292-8466 J Measuring just 11" wide x 11" deep x 5" high, and weighing a mere 7 pounds, the Altair™ 680b is a "complete, general-purpose computer. The secret to this revolutionary, small computer is its CPU board. This double-sided board fits along the bottom of (he Altair case and plugs directly into the front panel board It contains the new 6800 microprocessor, 1,024 bytes of RAM memory, a 256 byte PROM monitor, provisions for 768 bytes of additional PROM or ROM, and a single Interface port with a Motorola ACIA serial interface adapter which can be configured either RS-2.)2 or TTY. A five level Baudot interface option is also available I he Altair 680b can be programmed from front panel switches, or it can be interfaced to a video display terminal, or teletype- writer. Three additional circuit boards can be plugged inside the Altair 680b for further memory and interface expansion the first of these boards is a 16k static- RAM memory board Software already developed includes Altair 680 BASIC with all the features of the 8k BASIC previously developed lor the Altair 8800. These include Boolean operators, the ability to read or write a byte from any 1,0 port or memory location, multiple statements per line, and the ability to interrupt program execution and then continue after the examination of variable values. This software takes only 6.8k bytes of memory space and a copy is included free with the purchase of the Altair 680 IbK memory board. Other software includes a resident two pass assembler. The Altair 680b is also compatible with Motorola 6800 software. The Altair b80h is ideal tor hobbyists who want a powerful computer system at an economic price. Altair 680b owners qualify NOTE: Altair is a trademark of MITS, Inc. lor membership in the Altair Users Croup, and like other Altaic owners, they receive a complimentary subscription to Computer Notes and complete factory support. PRICES: Altair 680b kit with complete, easy-to-understand assembly man- ual, operator s manual, and programming manual $466 Assembled Altair 680b j &2 5 Altair 680b turnkey model kit 395 I xpander Card 680MB (required to expand 680) $ >4 Altair 680BSM 16k static RAM board kit with 680 BASIC $685 Altair 680 BASIC when purchased separately $200 Baudot option j"^-, MAIt THIS COUPON TODAY □ Enclosed is a check for *_ □ BankAmerirard - -or Master Charge n_ Q Altair bSOh D Kit D Assembled Q Other fspeci.y) em lose 48 u,i post Ige and handling □ Please send tree information package. - STATE «. ZIP_ ©LXfQLjiS© 2450 Alamo SE/Albuquerque, NM 87106, 505-243-7821 speciiu ations subject to change Please allow up to b0 da - deli'